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Registered: ‎11-09-2015

Video Series 21: TPG Application on ZC702

 

Introduction

 

Using the Test Pattern Generator IP is a good way to test a video interface with a simple design.

In this Video Series 21, we will modify the application created in the Video Series 20 to configure and start the Test Patten Generator IP in order to display a pattern on a monitor using the on-board HDMI (with ADV7511).

In this Video Series 21 we will see how to use the baremetal drivers for the Xilinx IPs in Xilinx SDK

 

1.jpg

 

 

 


Summary

 

1. Tutorial – TPG Application on ZC702

2. What Next?

 


 

Tutorial – TPG Application on ZC702

Create the Xilinx SDK workspace

 

  1. Download the tutorial files and unzip the folder

  2. Start the Xilinx Software Command Line Terminal (XSCT) 2018.1
  • From windows menu

Start > All Programs > Xilinx Design Tools > Xilinx Software Command Line Tool 2018.1

  • From command line

Use the command xsct (the environment variables for SDK 2018.1 need to be set)

  1. In xsct, cd to the path of the extracted folder. The enter the command source create_SW_proj.tcl

    2.png

     

  1. Open SDK and select XVES_0021/sdk_workspace

The application is based on the previous Video series.

Explore the drivers for the Xilinx TPG IP

When we create an application project in SDK, we have to select or create a new Board Support Package.

3.png

 

When the application is created we can then see the BSP created in our workspace

4.png

 

 

This BSP contains the drivers for the Xilinx IPs included in the Hardware (Vivado) design

  1. Expend the bsp folders: ps7_cortexa9_0 > libscr. You can see the drivers for the tpg located in the folder v_tpg_v8.0

 

5.png

 

 

  1. Open the file xv_tpg.c. You can see some driver APIs which are available for the TPG IP.

Configure and Start the TPG

The first step we need to do to use the TPG IP, which is common with most IPs, is to initialize the driver. This step is used by the application to get the HW information of the IP (ex. Address, configuration…). For this we can use the function:

 

int XV_tpg_Initialize(XV_tpg *InstancePtr, u16 DeviceId)

 

InstancePtr a pointer pointing to the instance. We can use the variable tpg_inst declared at the top of the application. DeviceId os the ID of the IP. This can be found in the xparameter.h created in the BSP

  1. Open the file xparameter.h in the BSP, under ps7_cortexa9_0 > include

  2. Search in the file for “TPG”. You can see that there is a define for the device ID for the TPG (XPAR_V_TPG_0_DEVICE_ID)

 

6.png

 

 

  1. Add the initialization function to the code

 

/* Insert the code for the TPG here */
Status = XV_tpg_Initialize(&tpg_inst, XPAR_V_TPG_0_DEVICE_ID);
if(Status!= XST_SUCCESS)
{
	xil_printf("TPG configuration failed\r\n");
    	return(XST_FAILURE);
}
/* End of TPG code*/

 

 

  1. Then we know that our Vivado design is set for 800x600p video. We have to configure the same resolution in the TPG:

 

// Set Resolution to 800x600 
XV_tpg_Set_height(&tpg_inst, 600);
XV_tpg_Set_width(&tpg_inst, 800);

 

 

  1. Then we know that we need to send YUV422 data. The corresponding configuration for the TPG is:

 

// Set Color Space to YUV422
XV_tpg_Set_colorFormat(&tpg_inst, 0x2);

 

 

  1. Finally, we can start the TPG with the following code:

 

//Start the TPG
XV_tpg_EnableAutoRestart(&tpg_inst);
XV_tpg_Start(&tpg_inst);
xil_printf("TPG started!\r\n");

 

 

  1. Save the source file and build the application (Right click on the application > Build Project).

This time, compared to the previous video series, we have to program the bitstream as we will use the PL part of the design (which contains the TPG IP).

  1. Make sure you have the ZC702 connected to the UART, the JTAG and HDMI.

  2. Click on Xilinx > Program FPGA. Then click Program


    7.png

     

  3. Open and configure Tera Term (or other UART terminal) for the ZC702 UART

  4. Then run the application (Right click on the Application > Run As > Launch on Hardware (System Debugger))

You should see a green pattern displayed on the monitor

 

1.jpg

Change the code

  1. We can change the pattern display in the code by using the function XV_tpg_Set_bckgndId. For example, to display a color bar pattern we can add the following code before starting the TPG

 

// Change the pattern to color bar
XV_tpg_Set_bckgndId(&tpg_inst, XTPG_BKGND_COLOR_BARS);

//Start the TPG

 

  1. Save the source file, re-build the application and re-run the application on the HW. You should now see a color bar pattern on the monitor

In some cases, it could be useful to have a moving pattern, for example to make sure the video is not frozen.

  1. Enable the moving box overlay by adding the following code before starting the TPG:

 

// Set Overlay to moving box
// Set the size of the box
XV_tpg_Set_boxSize(&tpg_inst, 50); 
// Set the speed of the box
XV_tpg_Set_motionSpeed(&tpg_inst, 5);
// Enable the moving box
XV_tpg_Set_ovrlayId(&tpg_inst, 1);
		
//Start the TPG

 

 

You should now see a box moving in front of the pattern.

 


What Next?

 

  • Do you have issues/questions following this Vivado Series?
    1. Search on the Xilinx forums for similar questions
    2. Create a new topic on the  Video Board for your issue/question with the title starting with [Video Series 21] and followed by a quick description of your issue/question
  • You liked this Video Series?
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VSERIES.JPG

 

 

 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**