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Observer joancab
Observer
4,329 Views
Registered: ‎05-11-2015

Video Timing Controller doesn't generate timing signals

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I'm developing a video system on Zynq. As a starting point I configured a basic system with three blocks:

- Video In to AXI

- Video Timing Controller

- AXI stream to video out.

 

My problem is VTC doesn't produce the timing signals for the AXI-to-Video block. Before I tried an even more simplified system with only generation enabled in the VTC and signals were present. Apparently, enabling the detection produces no output. I went through the VTC datasheet a number of times, I couldn't find any clue about what's missing. Anyone can spot the bug?

Untitled picture.png
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Observer joancab
Observer
7,786 Views
Registered: ‎05-11-2015

Re: Video Timing Controller doesn't generate timing signals

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I'm not using extreme conditions, clock is 50 MHz (20 ns) and behavioural simulation (timing closure will be a future fight)

 

I re-did the design with the full set of signals (both syncs, both blanks and active), and ran for more than 3 frames (what did before) and, ta-dah, the VTC signals came out. Also the video out signals after the lock flag is set.

 

Before, with not all the signals, I also ran the sim for many frames but didn't get the signals. It might be the full set of signals are needed (or the unused ones be tied to zero instead of floating)

 

 

So it seems that particular problem is over now.

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9 Replies
Moderator
Moderator
4,321 Views
Registered: ‎11-09-2015

Re: Video Timing Controller doesn't generate timing signals

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Hi @joancab,

 

Did you disable the detection for v_blank_in, h_blank_in and active_chroma_in?

 

From PG016 (v6.1) p46:

vtc.JPG

 

Regards,

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Xilinx Employee
Xilinx Employee
4,319 Views
Registered: ‎05-07-2015

Re: Video Timing Controller doesn't generate timing signals

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HI @joancab

 

which version of vivado are you using. there was issue with timing signals egenration when gen_clken is used .
But that is fixed in Vivado 2015.1 and  later.

 

Also please show us your VTC  config settings once.

 

Thanks
Bharath
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Observer joancab
Observer
4,312 Views
Registered: ‎05-11-2015

Re: Video Timing Controller doesn't generate timing signals

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According to PG016:

The minimum set of inputs required to detect is either vertical blank, horizontal blank and active video or vertical sync, horizontal
sync and active video

I'm sending just Hsync, Vsync and ActiveVideo to the Video In to AXI and in VTC I have just those three enabled for detection.

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Observer joancab
Observer
4,311 Views
Registered: ‎05-11-2015

Re: Video Timing Controller doesn't generate timing signals

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I'm running 2016.3, configuration is as attached.

Untitled picture.png
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Moderator
Moderator
4,292 Views
Registered: ‎11-09-2015

Re: Video Timing Controller doesn't generate timing signals

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Hi @joancab,

 

Then I would check the input signals. Are you sure you have a correct timing?

 

If you just output the input signals (remove all the IPs, just connect the inputs to the outputs), can you display the video on a monitor?

 

Regards,

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Observer joancab
Observer
7,787 Views
Registered: ‎05-11-2015

Re: Video Timing Controller doesn't generate timing signals

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I'm not using extreme conditions, clock is 50 MHz (20 ns) and behavioural simulation (timing closure will be a future fight)

 

I re-did the design with the full set of signals (both syncs, both blanks and active), and ran for more than 3 frames (what did before) and, ta-dah, the VTC signals came out. Also the video out signals after the lock flag is set.

 

Before, with not all the signals, I also ran the sim for many frames but didn't get the signals. It might be the full set of signals are needed (or the unused ones be tied to zero instead of floating)

 

 

So it seems that particular problem is over now.

Untitled picture.png
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3,120 Views
Registered: ‎03-24-2017

Re: Video Timing Controller doesn't generate timing signals

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Hi Joancab, 

I am trying to create very similar system to what you are doing. see the image below

Input: Synthetic video value (Const), vid_clock_in, vid_hsync_in, vid_vsync_out (I am considering video active is the same of vid_hsync)

Output: vid_sync_out[23:0], vid_vsync_out, vid_hsync_out, vid_data_valid_out

 

I have the same problem: I couldn't get Vysnc, Hsyn, Datavalid signals correctly from AXI4S to Video Out IP. 

 

My system is reading video from FMC1 and passing it to FMC2, Zynq ZC702 board. 

I have checked the input signals, (vid_vsync_in, vid_hsync_in, vid_data_in) all of them are correct. 

 

Any suggestion?

 

Capture.PNG

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Moderator
Moderator
3,105 Views
Registered: ‎11-09-2015

Re: Video Timing Controller doesn't generate timing signals

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Hi @talebalashkar,

 

Is your reset_en correctly with a high value (the reset is active low)?

 

Did you configure the correct video size in the VTC?

 

Do you see the signals overflow or underflow our of the AXI4-Stream to Video out IP?

 

Regards,

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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3,072 Views
Registered: ‎03-24-2017

Re: Video Timing Controller doesn't generate timing signals

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Thanks Forent for your reply. 

 

Reset_en is connected to constant block which has value 1 always. 

For video size there is limits, our frame size 1280 by 800 and we used 720P as mentioned in the datasheet of our image sensor. 

 

There is consistent underflow signal toggling out of axi4to video out core.

Here the video in to axi4 settings

 

vid_in_axi4.PNG

 

 

Please check screenshots of vtc configuration

VTC_detection_generation.PNG

 

Axi4s to Video OUt settings: 

 

 

axi4_vid_out.PNG

 

 

VTC_video_format.PNG

 

 

 

 

 


frame rate 720p
Image sensor used has active pixels 1280x800

There is consistent underflow signal toggling out of axi4to video out core.

 

Here is our test bench code: 

 

 

testbench.PNG

 

and here the simulation result

 

simulationWaveform.PNG

 

 

Do you have any suggestions? 

Taleb

 

 

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