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1,550 Views
Registered: ‎03-03-2017

Video test pattern generator broken on 2017.4, help!

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Hi,

   I am trying to work with a design that contains the Video Test Pattern Generator in Vivado 2017.4 which worked until I changed the VTPG to use 4 pixels per clock and now I am getting the symptoms mentioned in the following AR:

 

https://www.xilinx.com/support/answers/70445.html

 

   Every time I try to synthesize I get the 11 errors shown below.   I have tried installing the files attached to the AR but still get the errors.

vtpg_errors.png

 

   Can somebody help?  I am not able to make progress until I can get past this.

   I have tried resetting output products, deleting the cache and runs directory, and I keep getting these errors.   


Thanks.

Tim

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Moderator
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1,769 Views
Registered: ‎11-09-2015

Re: Video test pattern generator broken on 2017.4, help!

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Hi @tim_severance,

 

This is a known issue on windows for some HLS based IP. I wrote AR#70421 for this. The patch for 2017.4 (windows) is attached.

 

The issue is fixed in 2018.1.

 

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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12 Replies
1,537 Views
Registered: ‎03-03-2017

Re: Video test pattern generator broken on 2017.4, help!

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Other details:

 - I am not using HLS, I am using plain Vivado 2017.4.

 - The design used to work (using the HDMI pass-through example generated in 2017.4), but I updated blocks to use 4 pixels per clock now.

 - I am trying to synthesize and implement in Windows 10.

 - I generated output products of the block design in OOC per block.

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1,531 Views
Registered: ‎03-03-2017

Re: Video test pattern generator broken on 2017.4, help!

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More details:

 - Attempted to load project in Linux Vivado 2017.4 (running on Redhat) where I deleted the cache and runs directories before loading the project.   After I right clicked the BD and generated output products I get the same failures.

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1,525 Views
Registered: ‎03-03-2017

Re: Video test pattern generator broken on 2017.4, help!

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More details:

  Looking at the block in the block design you can clearly see the pins (see below).   Is there a file somewhere where I can see the module definition, or is this encrypted somewhere where I do not have access?

 

vtpg_error1.png

 

Tim

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Scholar jmcclusk
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1,515 Views
Registered: ‎02-24-2014

Re: Video test pattern generator broken on 2017.4, help!

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It seems that the bug is present under Linux, as well, which is annoying.   I'm glad I'm not using 4 pixels per clock in my project.   I'm following this thread, because I also need to know the solution to this issue.    As an observation, can you read the verilog file produced by HLS in your project subdirectory?

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Registered: ‎03-03-2017

Re: Video test pattern generator broken on 2017.4, help!

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@jmcclusk,

   Do you know where this file is that you are wanting me to look at?   Is it in the sources_1/bd/bd_name/ip/exdes_v_tpg_0_0/hdl/vhdl  subdirectory?   If so, I see the following files there:

 

vtg_vhdl_files.png

 

Tim

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Registered: ‎03-03-2017

Re: Video test pattern generator broken on 2017.4, help!

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@jmcclusk,

   Sorry, you said Verilog...

   Below is the sources_1\bd\exdes\ip\exdes_v_tpg_0_0\hdl\verilog\exdes_v_tpg_0_0_v_tpg.v file, showing it is not readable:

 

verilog_file.png

 

Tim

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1,480 Views
Registered: ‎03-03-2017

Re: Video test pattern generator broken on 2017.4, help!

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Found something interesting.

 

I deleted the block v_tpg fromthe block design and re-added a new one and called it vtg instead of v_tg and this time when I generated output products it passed.

 

I would not say that this is the final solution for sure, I will wait to hear from Xilinx on what they think.

 

Tim

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1,454 Views
Registered: ‎10-04-2017

Re: Video test pattern generator broken on 2017.4, help!

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Hi @Tim and @jmcclusk,

 

I do not believe there is a problem with the TPG generation on Linux. (I am running a quick project to verify)

 

I think the reason you ran into this on Linux is that the V_TPG files were generated on Windows and then copied over to Linux. On Linux, Vivado did not regenerate these files until they were removed. Once they were removed Vivado regenerated the V_TPG using HLS.

 

I do not recommend copying projects from Linux to Windows or Windows to Linux.

 

Regards,

Sam

 

 

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Xilinx Video Design Hub
1,449 Views
Registered: ‎03-03-2017

Re: Video test pattern generator broken on 2017.4, help!

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@samk,

   Thanks for the tip.   There will be many times when I will need to go back and forth with my projects between Linux and Windows.  Can you recommend the best way to do this?

    Regarding the vtg, after I transferred the files to Linux I deleted the Cache and Runs subdirectories.   Should I have deleted other directories to ensure the files get recreated?   I can test it out tomorrow. 

Thanks 

Tim

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889 Views
Registered: ‎10-04-2017

Re: Video test pattern generator broken on 2017.4, help!

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Hi @tim_severance,

 

My design completed successfully. (TPG example design updated for 4bpc).

 

Removing the Cache and Runs subdirectories was a good start, but you will also want to make sure all runs have been reset within the Vivado GUI. (Synthesis, Implementation, and all OOC runs) I believe it was the OOC runs that caused an issue here. This is not necessary for the majority of projects but is worth the piece of mind.

 

**For the majority of projects there will not be an issue switching between Windows and Linux, but this is not guaranteed. As you found out today :)

 

-Sam

 

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Xilinx Video Design Hub
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1,770 Views
Registered: ‎11-09-2015

Re: Video test pattern generator broken on 2017.4, help!

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Hi @tim_severance,

 

This is a known issue on windows for some HLS based IP. I wrote AR#70421 for this. The patch for 2017.4 (windows) is attached.

 

The issue is fixed in 2018.1.

 

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
862 Views
Registered: ‎03-03-2017

Re: Video test pattern generator broken on 2017.4, help!

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@florentw,

   Thanks for the response. 

Tim

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