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Contributor
Contributor
560 Views
Registered: ‎10-18-2018

Writing a Custom Video/Image Processing IP

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Hello!

I want to write some custom IPs for Image/Video Processing applications. I have written some of them for a fixed data width. As I am working on medical applications, increasing the data width size seems quite probable. I want to know whether we can write an IP with variable data size and how will the used IPs from the IP LogiCore will assume the same data width?

Thanks!   

Best Regards,
Urvish
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1 Solution

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Moderator
Moderator
529 Views
Registered: ‎11-09-2015

Re: Writing a Custom Video/Image Processing IP

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Hi urvish@htic,

There are few things to take in account:

  • Will your data width be fixed when adding the IP (i.e. the data width will be set before synthesis. You configurable data width can be a generic parameter in the RTL)
    • In this case most Xilinx IPs will be able to support it (8,10,12,16 bits component wide)
  • If your data width is changing during run time, this is a different story. Most IPs are not supporting dynamic width change. I am not even sure if we have many IPs which can be changed dynamically. One solution could be to use the max width to configure the IPs and just add some padding bits for the LSBs.

Hope that helps,

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

1 Reply
Moderator
Moderator
530 Views
Registered: ‎11-09-2015

Re: Writing a Custom Video/Image Processing IP

Jump to solution

Hi urvish@htic,

There are few things to take in account:

  • Will your data width be fixed when adding the IP (i.e. the data width will be set before synthesis. You configurable data width can be a generic parameter in the RTL)
    • In this case most Xilinx IPs will be able to support it (8,10,12,16 bits component wide)
  • If your data width is changing during run time, this is a different story. Most IPs are not supporting dynamic width change. I am not even sure if we have many IPs which can be changed dynamically. One solution could be to use the max width to configure the IPs and just add some padding bits for the LSBs.

Hope that helps,

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post