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Visitor ddanapal
Visitor
939 Views
Registered: ‎06-19-2018

XAPP894 MIPI D-PHY IP Core support on Virtex Ultrascale

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Hi there,

 

  I'm planning to implement the MIPI CSI interface on our Virtex Ultrascale XCVU440-FLGA2892-2-I FPGA platform based on XAPP894.  The plan is to use the Xilinx MIPI D-PHY IP Core with components from Meticom.  However, I found that I'm unable to generate the MIPI D-PHY IP Core if I have a Virtex Ultrascale part selected in Vivado.

 

  I do see that Xilinx mention that Ultrascale is supported through XAPP894 in the following video:

  https://www.youtube.com/watch?v=uCEcz6JiaBk  

 

  Is there any fundamental reason why the MIPI D-PHY IP Core is not supported on Virtex Ultrascale?  I am able to generate it for Virtex 7 but I would assume that there will be differences in the primitives used between Virtex 7 vs. Ultrascale.  We really need to use the MIPI D-PHY IP Core on XCVU440 to fit the rest of our design.

 

  Please advise.  Thank you.

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Xilinx Employee
Xilinx Employee
968 Views
Registered: ‎03-30-2016

Re: XAPP894 MIPI D-PHY IP Core support on Virtex Ultrascale

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Hello @ddanapal

 

Unfortunately, Xilinx MIPI IPs does not support UltraScale.

Please consider to use 7-series (with external PHY i.e Meticom) or UltraScale+ devices (that have native MIPI D-PHY support).

 

Or you may want to contact Nortwest Logic to find out whether their MIPI IP can target Xilinx UltraScale devices.

 

Best regards

Leo

 

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2 Replies
Xilinx Employee
Xilinx Employee
969 Views
Registered: ‎03-30-2016

Re: XAPP894 MIPI D-PHY IP Core support on Virtex Ultrascale

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Hello @ddanapal

 

Unfortunately, Xilinx MIPI IPs does not support UltraScale.

Please consider to use 7-series (with external PHY i.e Meticom) or UltraScale+ devices (that have native MIPI D-PHY support).

 

Or you may want to contact Nortwest Logic to find out whether their MIPI IP can target Xilinx UltraScale devices.

 

Best regards

Leo

 

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Moderator
Moderator
845 Views
Registered: ‎11-09-2015

Re: XAPP894 MIPI D-PHY IP Core support on Virtex Ultrascale

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Hello @ddanapal,

 

Are you happy with the reply provided by @karnanl. If yes, could you kindly mark it as accepted solution (button accept as solution below the replied when you are logged in).

 

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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