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Adventurer
Adventurer
340 Views
Registered: ‎08-09-2013

ZC706 Evaluation Board HDMI Example Design for Test pattern Generator in Vivado 2018.1 or 2019.1

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HI,

I went through the Video Series Tutorial, Video series has example's for demostration of ZC702 for HDMI based Test Pattern Generator.

I am having ZC706 Board, Since the mode of operation of HDMI is changed from YcbCr 4:2:2 to Ycbcr 4:4:4. Since i am new to video processing. Please help.

Regards,

Rajesh khanna

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Adventurer
Adventurer
163 Views
Registered: ‎08-09-2013

Re: ZC706 Evaluation Board HDMI Example Design for Test pattern Generator in Vivado 2018.1 or 2019.1

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Hi,

We are able to resolve the issue in ZC706, problem is we need to use clock as 148.5 MHZ for 1920 X 1080 @ 60 Hz Resolution.

Regards,

Rajesh khanna

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Xilinx Employee
Xilinx Employee
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Registered: ‎03-07-2018

Re: ZC706 Evaluation Board HDMI Example Design for Test pattern Generator in Vivado 2018.1 or 2019.1

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Hello @rajeshkhanna 

I believe you are mentioning design provided at https://forums.xilinx.com/t5/Video/Video-Series-19-Using-the-On-Board-HDMI-on-ZC702-Vivado-design/td-p/914989 . Please confirm.

I will reproduce this issue and let you know details.

Regards,
Bhushan

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Adventurer
Adventurer
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Registered: ‎08-09-2013

Re: ZC706 Evaluation Board HDMI Example Design for Test pattern Generator in Vivado 2018.1 or 2019.1

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Hi,

Yes you are right we tried with the same design modified the ucf and settings corresponding to ZC706 but the design is not working.

Regards,

Rajesh khanna

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Xilinx Employee
Xilinx Employee
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Registered: ‎03-07-2018

Re: ZC706 Evaluation Board HDMI Example Design for Test pattern Generator in Vivado 2018.1 or 2019.1

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Hello @rajeshkhanna 

There is limitation with ZC702 HDMI Codec innterface. Only 16-bit of Video Data lanes are connected for ADV7511 IC. So, ADV7511 supports 1080P 60Hz, YCbCr 4:2:2 encoding via 16-bit input data mapping on ZC702 board.

ZC702 codec connection.jpg

While YUV4:4:4 data type requires 24 bit Video data lines. 

AXI4_stream_to_Video_Out.jpg

 

Regards,
Bhushan

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Adventurer
Adventurer
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Registered: ‎08-09-2013

Re: ZC706 Evaluation Board HDMI Example Design for Test pattern Generator in Vivado 2018.1 or 2019.1

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HI Bhusan,

Thanks for you reply.

The codec you are showing corresponding to ZC702. I having ZC706 the codec shown as per user guide is as follows. I am able to generate the bit file and able to detect the monitor. i am not able to send video to display. display resolution is 1920 x 1080 - 60 Hz.

HDMI_ZC706.png

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Adventurer
Adventurer
164 Views
Registered: ‎08-09-2013

Re: ZC706 Evaluation Board HDMI Example Design for Test pattern Generator in Vivado 2018.1 or 2019.1

Jump to solution

Hi,

We are able to resolve the issue in ZC706, problem is we need to use clock as 148.5 MHZ for 1920 X 1080 @ 60 Hz Resolution.

Regards,

Rajesh khanna

View solution in original post

0 Kudos