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Visitor hisuer
Visitor
224 Views
Registered: ‎08-13-2019

Zynq UltraScale+ MPSoC VCU TRD 2018.3-VCU SDI TX 422 10bit Support

I am using a Zynq Ultrascale+ MPSoC ZCU106 board,based on “\rdf0428-zcu106-vcu-trd-2018-3\images\vcu_sditx”;I want to do test decode HEVC 422 10bit and output 10bit stream.

We use “gst-launch-1.0 -v udpsrc uri="udp://192.165.54.218:12340" ! tsdemux ! queue ! h265parse ! omxh265dec ! kmssink bus-id="a0070000.v_mix"”, When Decode 420 8bit stream it work fine.

When stream changed to  422 10bit, omxdec report negotion errror.

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5 Replies
Moderator
Moderator
173 Views
Registered: ‎11-09-2015

Re: Zynq UltraScale+ MPSoC VCU TRD 2018.3-VCU SDI TX 422 10bit Support

HI @hisuer 

I think only NV12 (i.e. 420 8bit) is supported for SDI in the VCU TRD 2018.3. This is why it is not working for you.

the VCU TRD 2019.1 seems to support XV20 for SDI TX (link) which is YUV422 10 bit. Yoiu might want to try with this version

Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Visitor hisuer
Visitor
164 Views
Registered: ‎08-13-2019

Re: Zynq UltraScale+ MPSoC VCU TRD 2018.3-VCU SDI TX 422 10bit Support

We test on 2019.1, xmodtest have XV20 support.So 2018.3 cann't support 422 10bit out?

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Moderator
Moderator
151 Views
Registered: ‎11-09-2015

Re: Zynq UltraScale+ MPSoC VCU TRD 2018.3-VCU SDI TX 422 10bit Support

Hi @hisuer 

I believe both the design and the driver in 2018.3 were not done for 10-bit. Please use 2019.1 for XV20.

Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Visitor hisuer
Visitor
129 Views
Registered: ‎08-13-2019

Re: Zynq UltraScale+ MPSoC VCU TRD 2018.3-VCU SDI TX 422 10bit Support

Thanks I will move to 2019.1

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Moderator
Moderator
107 Views
Registered: ‎11-21-2018

Re: Zynq UltraScale+ MPSoC VCU TRD 2018.3-VCU SDI TX 422 10bit Support

Hi @hisuer 

 

If your question is answered or your issue is solved, please kindly mark the response which helped as solution (click on "Accept as solution" button below the reply).

 

If this is not solved/answered, please reply in the topic giving more information on your current status.

 

Thanks and Regards,

Aoife
Product Application Engineer - Xilinx Technical Support EMEA
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