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Explorer
Explorer
716 Views
Registered: ‎01-04-2013

about vdma v6.2

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Hello everyone

In vivado 2015.4,when I double click the vdma of IP Catalog,I have two choices

QQ拼音截图20180321140619.png

When I choose Add IP to Block Design,I get a block of vdma in block design

QQ拼音截图20180321141551.png

When I double click on the vdma,I find that the Stream Data Width is automatically set to 32 ,howerver the MemoryMap Data width is greater than 32.

But when I choose "Customize IP",I can set the stream Data Width to 64.

QQ拼音截图20180321142243.png

Can anyone tell me why?

Best Wishes

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Explorer
Explorer
1,006 Views
Registered: ‎01-04-2013

Re: about vdma v6.2

Jump to solution

Thanks for your replying

I have solved the problem by connecting a axi4-stream_data_fifo between my user-logic and stream data port of vdma

Best Wishes

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2 Replies
Adventurer
Adventurer
687 Views
Registered: ‎07-18-2011

Re: about vdma v6.2

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The IP block AXI4-stream data width is automatically set by Vivado.  It will change depending upon the AXI4-Stream width of the IP component you have connected to it.   This automatic setting will take place when you validate the design, by clicking the "check box" icon or by pressing the "F6" key.

 

For example, if you have the M_AXIS_MM2S port connected to an AXI4-Stream to Video Out IP block which is set up for 8-bit RGB (which is 24-bit video), the setting will change from 32-bit to 24-bit after you validate the block design. 

 

 

Explorer
Explorer
1,007 Views
Registered: ‎01-04-2013

Re: about vdma v6.2

Jump to solution

Thanks for your replying

I have solved the problem by connecting a axi4-stream_data_fifo between my user-logic and stream data port of vdma

Best Wishes

0 Kudos