05-15-2018 02:06 PM
I am working with HDMI designs on Kintex 7 devices using Vivado/SDK 2018.1 and was wondering if there was a table somewhere that tells me what GTX ref-clock frequency is needed for every video timing mode (specifically all timing modes in bsp\proc_mblz\libsrc\video_common_v4_3\src\xvidc_timings_table.c (line 94 const XVidC_VideoTimingMode XVidC_VideoTimingModes[XVIDC_VM_NUM_SUPPORTED]).
Does somebody know if the required ref-clock frequency for each of these elements is specified somewhere?
05-16-2018 04:25 PM
05-16-2018 03:16 PM
I think that your developing product is like interface converter from DP to HDMI.
I can not understand main purpose about your post.
It means that it is difficult to reply your post without detail of target, spec and main purpose.
If you can not describe them, I suggest to hire some professional person or use professional service to archive success.
It requires a lot of know-how...
05-16-2018 03:23 PM
@watari, Thanks for your response.
I am actually referring mainly to an HDMI design and not concerned about DisplayPort with this question.
Let's say for example I am using the Xilinx example HDMI Tx design for the Kintex-7 KC-705 hardware and I want to setup the HDMI source to output all possible resolutions within that table that I referred to in my original post. For each of these, how do I know what the GT-Ref-clock frequency (i.e. Si5324 on the Inrevium board) to set for each of these output resolutions?
I am hoping you can point me to some reference document.
05-16-2018 03:34 PM
05-16-2018 03:40 PM
Thanks, that is definitely helpful. So the reference should be the TMDS clock unless the allowed range is violated then a multiplier is used.
Forgive me for another question, but is there a table that shows what the TMDS clock is for a specific resolution (i.e. a known pixel-clock frequency)?
05-16-2018 03:47 PM
I don't know any tables (does not mean that it does not exist).
You could do a table in excel using the formula from the HDMI spec.
05-16-2018 04:25 PM
05-16-2018 05:42 PM
If you need an ultra-low jitter reference clock that is programmable for multiple frequencies, you may want to look into the Silicon Labs Si544 series. They can be programmed via I2C for just about any clock frequency, and some of them have pins you can set for up to four different startup frequencies.
05-16-2018 06:55 PM - edited 05-16-2018 07:10 PM
If you want to know HDMI clocking structure (relationship between Link clock, Data clock, Pixel clock and Video clock), you are correct.
But, if you consider compatibility between HDMI source and sync device, I suggest to study more.
Because of it is requested some know-how by compatibility.
It is not IP region like Xilinx. It is vender region.
Of cause, if problems are caused by IP, it's IP region...
However, at least, I suggest to study or refer some documents about CEA-861, CVT and CVT formula.
05-23-2018 06:35 PM
If everything clear for you on this? If yes please kinly close the topic by marking a reply as accepted solution.
Thanks and Regards,