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Adventurer
Adventurer
414 Views
Registered: ‎06-05-2019

monitor mipi data regardless mipi clk with ILA

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The following URL has explained that the mipi clk can not probe using ILA.

https://forums.xilinx.com/t5/Video/monitor-mipi-phy-if-signals-using-system-ILA/m-p/953651/highlight/false#M24437 

But if I only want to monitor the mipi data pin, can i use ila to achieve this purpose?

微信截图_20191015124631.png

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Xilinx Employee
Xilinx Employee
370 Views
Registered: ‎03-30-2016

Re: monitor mipi data regardless mipi clk with ILA

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Hello @ivanfan 

1. You cannot monitor MIPI serial data input.

2. But you can monitor parallel data output from MIPI D-PHY RX module.
    Please probe the following data instead.
            dl*_rxdatahs[7:0]
            dl*_rxvalidhs
            dl*_rxsynchs
            dl*_rxactivehs
MIPI_CSI.png
  # The parallel data you observed from MIPI CSI-2 RX module maybe bit-shifted,
      This is expected because we do not have byte alignment features in MIPI D-PHY RX IP.
     
3. Regarding clock for ILA probing.
      (a) If your TX/sensor uses MIPI continuous clock, you can use rxbyteclkhs for probing.
      (b) If your TX/sensor uses MIPI non-continuous clock, you should use free-run clock.
# Note you may see a glitch on probing data when using free-run clock.
# you cannot use rxbyteclkhs, since rxbyteclkhs will stops if serial input clock stops during LP period.

Hope this helps.

Regards
Leo

7 Replies
Xilinx Employee
Xilinx Employee
371 Views
Registered: ‎03-30-2016

Re: monitor mipi data regardless mipi clk with ILA

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Hello @ivanfan 

1. You cannot monitor MIPI serial data input.

2. But you can monitor parallel data output from MIPI D-PHY RX module.
    Please probe the following data instead.
            dl*_rxdatahs[7:0]
            dl*_rxvalidhs
            dl*_rxsynchs
            dl*_rxactivehs
MIPI_CSI.png
  # The parallel data you observed from MIPI CSI-2 RX module maybe bit-shifted,
      This is expected because we do not have byte alignment features in MIPI D-PHY RX IP.
     
3. Regarding clock for ILA probing.
      (a) If your TX/sensor uses MIPI continuous clock, you can use rxbyteclkhs for probing.
      (b) If your TX/sensor uses MIPI non-continuous clock, you should use free-run clock.
# Note you may see a glitch on probing data when using free-run clock.
# you cannot use rxbyteclkhs, since rxbyteclkhs will stops if serial input clock stops during LP period.

Hope this helps.

Regards
Leo

Adventurer
Adventurer
347 Views
Registered: ‎06-05-2019

Re: monitor mipi data regardless mipi clk with ILA

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I used the csi-2 rx subsystem ip to receive the mipi data and i can not inset ILA into the subsystem.

微信截图_20191016165550.png

Moderator
Moderator
340 Views
Registered: ‎11-09-2015

Re: monitor mipi data regardless mipi clk with ILA

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HI @ivanfan 

You need to add the ILA on the synthesized design. You might want to refer to the lab1 of my Video Series 31 – Debugging a Video System using an ILA for guidance on how to do it.

Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
Adventurer
Adventurer
334 Views
Registered: ‎06-05-2019

Re: monitor mipi data regardless mipi clk with ILA

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Thank you for your replying.

I found another debug way in PG232. The Appx of PG232 has said how to debug the csi rx subsystem briefly. How can i observe the value of the MIPI CSI-2 RX Controller registers as mentioned in the picture below?

微信截图_20191016182254.png

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Adventurer
Adventurer
307 Views
Registered: ‎06-05-2019

Re: monitor mipi data regardless mipi clk with ILA

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I followed the guidance and encountered error in generating bitstream.

 

微信截图_20191016220430.png

 

微信截图_20191016220133.png

Moderator
Moderator
302 Views
Registered: ‎11-09-2015

Re: monitor mipi data regardless mipi clk with ILA

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HI @ivanfan 

It seems that you are still trying to get the data at the IO which is not possible because there is no path for the ILA. Doing it from the synthesized design will not change the problem. So you are back to the initial question.

If you want to probe anything you need to probe the signals recommended by Leo:

dl*_rxdatahs[7:0]
dl*_rxvalidhs
dl*_rxsynchs
dl*_rxactivehs


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
Xilinx Employee
Xilinx Employee
258 Views
Registered: ‎03-30-2016

Re: monitor mipi data regardless mipi clk with ILA

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Hello @ivanfan 

Please read twice the suggestion from Florent and my email above.

Thank you
Leo