05-24-2018 12:51 AM
06-22-2018 01:48 AM - edited 08-21-2018 11:14 PM
The test pattern generator needs to be started. Usually by writing 0x81 at address 0x0.
Note 1 : You can generate an example design for the TPG for reference for both HW and SW. Refer to chapter 6 of pg103.
Note 2 : You might want to look at my Xilinx Video Series. I use the TPG in simulation in many of them.
08-14-2018 07:28 AM
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08-21-2018 04:50 AM
08-21-2018 11:15 PM
Could you kindly share what was your solution with the community and mark it as accepted solution (click on accept as solution below the reply while logged in)?