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Participant gandics
Participant
1,146 Views
Registered: ‎05-02-2018

yuv422 input-->vpss problem

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hi,
yuv422 16bit--> vid_in_axi4_out--> vpss(scaling) --> rgb 24bit.Scaling function has completed.
Video processing core input is 24bit fixed by 1 per pixclk,and my signal input is yuv422 16bit.
1.In full-fledged mode,support rgb&yuv444&yuv422 format,how can i use it complete scaling and format conversion function?(Scaling function has completed.)
2. yuv422 16bit output(vid_in_axi4_out) --> vpss 24bit input-->axi4_vid_out-->screen.Picture red component lost.why?
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1 Solution

Accepted Solutions
Moderator
Moderator
1,433 Views
Registered: ‎11-09-2015

回复: yuv422 input-->vpss problem

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HI @gandics,

 

I tell the VPSS input stream is XVIDC_CSF_YCRCB_422 and output stream is XVIDC_CSF_RGB,but It doesn't transform property.I have to convert to RGB format by myself before entering the VPSS,and the outputing is right.

> Could you explain what you have done?

Note that on the AXI4-Stream, the data are mapped in RBG order:

AXI4S.JPG

 

 

 

I still have some question:

1.Using 4 VPSS ang 1MIX core,I mixed four-channel input to one 1920x1080 output,960x540 each one.I set the 960x540 video timing mode in the xvidc_timings_table.c and declare in the xvidc.h.But each channel lost 1 pixes, the screen outputing,every pictures have one split between each other.why?

960x540 mode setting:

XVIDC_VM_960X540_60_P

{960,44,22,84,1110,1,

540,1,3,19,563,0,0,0,0,1}

 > Not sure. But it can be coming for the position you use for the video mixer

 

 

2.It is neccesery to tell VPSS input stream frame rate?

My video input signal connect the computer DVI outputing,resolution and frame rate always change by itsely when computer strart-up.So I have to use VTD core to tell VPSS the changing resolution,But the frame rate change I have no way to know.

> No it shouldn't be necessary.

 

Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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7 Replies
Participant gandics
Participant
1,127 Views
Registered: ‎05-02-2018

回复: yuv422 input-->vpss problem

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thanks for reply!
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Moderator
Moderator
1,094 Views
Registered: ‎11-09-2015

回复: yuv422 input-->vpss problem

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Hi @gandics,

 

You should just have to tell the VPSS you input stream configuration and output stream configuration. And the VPSS will all select for you.

 

You might want to have a look to the VPSS example design. It does both scaler and color space conversion.

 

Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Participant gandics
Participant
1,066 Views
Registered: ‎05-02-2018

回复: yuv422 input-->vpss problem

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Hi @florentw ,

Thanks for your reply!

 

I tell the VPSS input stream is XVIDC_CSF_YCRCB_422 and output stream is XVIDC_CSF_RGB,but It doesn't transform property.I have to convert to RGB format by myself before entering the VPSS,and the outputing is right.

 

I still have some question:

1.Using 4 VPSS ang 1MIX core,I mixed four-channel input to one 1920x1080 output,960x540 each one.I set the 960x540 video timing mode in the xvidc_timings_table.c and declare in the xvidc.h.But each channel lost 1 pixes, the screen outputing,every pictures have one split between each other.why?

960x540 mode setting:

XVIDC_VM_960X540_60_P

{960,44,22,84,1110,1,

540,1,3,19,563,0,0,0,0,1}

 

2.It is neccesery to tell VPSS input stream frame rate?

My video input signal connect the computer DVI outputing,resolution and frame rate always change by itsely when computer strart-up.So I have to use VTD core to tell VPSS the changing resolution,But the frame rate change I have no way to know.

 

Thanks!

2.jpg1.jpg

 

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Moderator
Moderator
1,434 Views
Registered: ‎11-09-2015

回复: yuv422 input-->vpss problem

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HI @gandics,

 

I tell the VPSS input stream is XVIDC_CSF_YCRCB_422 and output stream is XVIDC_CSF_RGB,but It doesn't transform property.I have to convert to RGB format by myself before entering the VPSS,and the outputing is right.

> Could you explain what you have done?

Note that on the AXI4-Stream, the data are mapped in RBG order:

AXI4S.JPG

 

 

 

I still have some question:

1.Using 4 VPSS ang 1MIX core,I mixed four-channel input to one 1920x1080 output,960x540 each one.I set the 960x540 video timing mode in the xvidc_timings_table.c and declare in the xvidc.h.But each channel lost 1 pixes, the screen outputing,every pictures have one split between each other.why?

960x540 mode setting:

XVIDC_VM_960X540_60_P

{960,44,22,84,1110,1,

540,1,3,19,563,0,0,0,0,1}

 > Not sure. But it can be coming for the position you use for the video mixer

 

 

2.It is neccesery to tell VPSS input stream frame rate?

My video input signal connect the computer DVI outputing,resolution and frame rate always change by itsely when computer strart-up.So I have to use VTD core to tell VPSS the changing resolution,But the frame rate change I have no way to know.

> No it shouldn't be necessary.

 

Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Participant gandics
Participant
1,015 Views
Registered: ‎05-02-2018

回复: yuv422 input-->vpss problem

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Hi @florentw ,

Thanks for your reply!

 

Problem sloved!

My 422 input data are maped in YUV order,however axi4-stream is reversed.

 

I am not clear what's your means:

Not sure. But it can be coming for the position you use for the video mixer.

This Problem still unsloved.Could you please help me to analysis the reason?

 

Thanks!

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Moderator
Moderator
1,009 Views
Registered: ‎11-09-2015

回复: yuv422 input-->vpss problem

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Hi @gandics,

 

Check that the start X and start Y values for each layers are correct


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Participant gandics
Participant
961 Views
Registered: ‎05-02-2018

回复: yuv422 input-->vpss problem

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Hi @florentw

 

Sorry for delay reply.

 

Color space convertion problem have been sloved,but mix position problem still exist.I will post here next time.

 

Thanks!

 

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