04-20-2010 08:09 PM
Whats the best way to create a 3 input clock mux(synchronous clocks) in Virtex5.
Is it okay if I use two BUFGCTRL's which might do the job, not sure if it allows to route.
04-21-2010 01:26 PM
Using 2 BUFGCTRL (BUFGMUX) will work. Do the 3 input clocks come from the same DCM or PLL with diference frequencies and/or phases?
04-21-2010 07:00 PM
04-22-2010 02:50 PM
Other than the select signal is missing, that should work. Using your example code, you can connect 3 PLL outputs directly to the CLK1IN, CLK2IN and CLK3IN ports on BUFGMUX1 and BUFGMUX2.