01-11-2013 12:47 AM
I have an ML507 FPGA and analog signals (+/- 5V, 100mA) which are around 40 in number.
I need to design an interface between the circuit and the FPGA with ADCs along with multiplexing (can not stress enough about the multiplexing since I have high humber if inputs and limited GPIOs).
It would be great if anyone could help me with this query?
PS: Please also let me know if you need any additonal details to answer this.
01-12-2013 06:28 PM
You haven't really stated what your analog requirements are. Do you need 40 simultaneous sampling channels, or can you multiplex the analog inputs? What are your resolution and sample rate requirements?
You can get ADCs with 16 (maybe even more) input channels such as the AD7490. These kinds of parts tend to have serial (e.g. SPI) output so you could easily connect many of these to an ML507.
If you need to simultaneously sample 40 channels at 16-bit, 100 MSPS then it should be possible but will be a bit more of a design challenge.
01-12-2013 06:36 PM
01-13-2013 07:28 PM
From an FPGA point of view, there's nothing too difficult about this task.
For the ADC, use the parametric search function provided by your favourite ADC manufacturers. I found one made by Analog Devices called the AD7607 which provides 8, 14-bit simultaneous sampling inputs at 200 KSPS, serial output, and a +/- 10V analog input. You'd need 5 of these to get 40 channels, but that shouldn't be much of a problem.
Typically you would need to design some sort of analog front end circuitry - coupling, amplification or attenuation, filtering, buffering, impedance matching, etc. This is a bit out of the scope of this forum though.