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Visitor lrb81
Visitor
10,687 Views
Registered: ‎01-08-2014

About processing of Virtex series FPGAs

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As known,Virtex-II was produced under 130nm processing,Virtex-4 under 90nm, Virtex-5 under 65nm,and Virtex- 6 under 40nm,now question is:which generation stards to be produced on Silicon-on-oxide(SOI),and which generation remains bulk-COMS technology. Please tell me,all professionals!

         Thanks a lot!

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Scholar austin
Scholar
18,558 Views
Registered: ‎02-27-2008

Re: About processing of Virtex series FPGAs

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i,

 

The next family will utilize TSMC 20nm SoC bulk CMOS process, again with hi-K metal gates similar to 28nm.  We will also have high-end Virtex parts in the bulk CMOS 16nm FinFet node from TSMC.

 

For some odd reason I cannot seem to fathom, CMOS on SOI just hasn't made it to the mainstream.  It remains a 'boutique' process, with very few takers.  SOI becomes less important for FinFet, yet it still has some avantages even there.

 

The SOI needed for optical is a thick back end oxide, which is different than than used for CMOS, and as optical doesn't need anything finer than 90 or even 65nm, and thick-BOX SOI for optical isn't good for electrical as it is only used with 65 or 90nm rules and dimensions.

 

SOI remains a solution seeking a problem.

 

Austin Lesea
Principal Engineer
Xilinx San Jose

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Scholar kotir
Scholar
10,675 Views
Registered: ‎02-03-2010

Re: About processing of Virtex series FPGAs

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7- series devices are on 28 nm, high-k metal gate (HKMG) process technology. Meaning that the silicon dioxide gate dielectric is replaced with some other material.

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Scholar austin
Scholar
18,559 Views
Registered: ‎02-27-2008

Re: About processing of Virtex series FPGAs

Jump to solution

i,

 

The next family will utilize TSMC 20nm SoC bulk CMOS process, again with hi-K metal gates similar to 28nm.  We will also have high-end Virtex parts in the bulk CMOS 16nm FinFet node from TSMC.

 

For some odd reason I cannot seem to fathom, CMOS on SOI just hasn't made it to the mainstream.  It remains a 'boutique' process, with very few takers.  SOI becomes less important for FinFet, yet it still has some avantages even there.

 

The SOI needed for optical is a thick back end oxide, which is different than than used for CMOS, and as optical doesn't need anything finer than 90 or even 65nm, and thick-BOX SOI for optical isn't good for electrical as it is only used with 65 or 90nm rules and dimensions.

 

SOI remains a solution seeking a problem.

 

Austin Lesea
Principal Engineer
Xilinx San Jose

View solution in original post

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Visitor lrb81
Visitor
10,617 Views
Registered: ‎01-08-2014

Re: About processing of Virtex series FPGAs

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Thank you so much!As you said,Virtex family FPGAs before Virtex-7 produced in UMC are all based on bulk silicon technology,is that correct?

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