08-24-2011 06:29 AM
I am attempting to replicate the over-temperature Power-Down feature of the Virtex 5 (ug192 - automatic alarms). I thought I can do something similar by using an internal signal to trigger a state machine which sends a sequence of commands to the configuration registers via ICAP primitive. I am using ML507 development board.
The plan was to write a Shutdown sequence ( as found in UG191, steps 1-5 in table 7-2) initiated by asserting my internal trigger signal. Conversely setting this internal trigger signal low writes a Startup sequence. I was hoping to combine xapp1100 (figure 4) example with the steps provided in UG191 to enable me to turn off/on the FPGA but I guess I am missing something.
So far I have instantiated the ICAP correctly since I have managed to reconfigure the FPGA using ICAP, and I have also got 'AGHIGH' cmd to force all pins to high-Z state. My next step was to get the Shutdown sequence working but I haven't succeeded yet. I have been careful to ensure RDWR_B is set low before CS_B; I have also byte-reversed all words correctly for ICAP. My state machine for shutdown write the following sequence of words : dummy - sync - NOOP - CMD - Shutdown - NOOP - CMD - RCRC - NOOP - NOOP -NOOP -NOOP - NOOP - NOOP which is the same in Table 7-2 of UG191.
I am programming the FPGA via JTAG in slave-serial mode and the mode pins remain set on "000". I have enabled -g Security for Readback & Reconfiguration, -g Persist for SelectMap pins persist is disabled.
What I want to know is firstly whether is it possible to powerdown and powerup the FPGA but instructing the FPGA internally. If yes, then is my approach incorrect or is my command sequence wrong?
08-24-2011 08:40 AM
08-26-2011 12:40 AM
I don't know what the Shutdown command does; whether it completely kills the FPGA or leaves the configuration area alive. It must be possible to startup the FPGA after internal shutdown otherwise how does the system monitor overtemperature function works. Surely it does the same by issuing commands to the configuration registers. I want to know which ones and how?
The SelectMap interface can shutdown and restart the FPGA for Readback. Since the ICAP is exactly the same as the SelectMap interface but it is internal, then why can't I do the same with the ICAP? There is a lack of information on how to get these commnads working or maybe I am not understanding it correclty.