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3,921 Views
Registered: ‎10-10-2008

CLKIN requirements for GTP Rocket IO configured for PCIe

Hi,

 

We are using the Vertex 5 FPGA's GTP rocketIO's for PCIe endpoint.  The design works absolutely fine when the CLKIN is fed with the Reference Clock
Differential
 from the PCIe connector but not when the clock is derived from some other source

 

Kindly clarify if the Xilinx SERDES can/cannot work if the clock source is other than the Reference clock from the PC.

 

Regards,

Srikanth 

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Xilinx Employee
Xilinx Employee
3,911 Views
Registered: ‎01-03-2008

Re: CLKIN requirements for GTP Rocket IO configured for PCIe

The GTPs can work with any quality differential clock source that has been AC coupled.

 

The standard system topology for PCIe is to use the same reference clock source for both the upstream and downstream points.

 

A PCIe system should be able to tolerate a 100ppm difference in the reference clock sources.

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