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Newbie akanekendo
Newbie
7,070 Views
Registered: ‎04-20-2009

Can I get 10ps delay increment in V5?

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In V5 data sheet, it is stated that the tap delay resolution can go down to 10ps. Does this mean I can get 10ps clock delay increment? I am needing this much resolution to do a BER bathtub curve scan.

 

Thanks a bunch,

 

ak

 

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Scholar austin
Scholar
8,574 Views
Registered: ‎02-27-2008

Re: Can I get 10ps delay increment in V5?

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Hi,

 

The delay line has 256 taps.

 

If the input frequency has a period of 25.6ns, then each step is +/- 7 to +/- 30 ps of 100 ps (basically it will go to the nearest tap that is closets to the desired phase).

 

To do what you want (characterize the errors with phase shift), you can do this, stepping 1/256 of the period.

 

Some commands to step to the next phase will not actually do anything (there is no tap any closer than the one you are already on).  Or, it weill advnace to the next tap which is the best and closest phase to what you are asking for (may be just one step, or many).

 

Since you can not build an exact phase delay, the DCM provides a digital interface and control, and has logic to figure out how to do what you ask.

 

It isn't exactly what you wanted, but it will do what you want.  It will just not use the step size you desire.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose

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3 Replies
Scholar austin
Scholar
7,047 Views
Registered: ‎02-27-2008

Re: Can I get 10ps delay increment in V5?

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ak,

 

Resolution of the delay line, and what can be easily acheived are two different things.


The delay chain is automatically adjusted to "hold" one full clock period in the delay line for DCM operation.


The phase shift feature move the phase (+ or -) by 1/256 of a period.  The delay line is from 7ps to 30ps depending on mode, temperature, etc.  You do not get to choose a delay, the clock period is chosen to "fit" into the delay line.


One step of the delay line is 1/256 the period, or the shortest delay step, whichever is LARGER.

 

So, if you had 40 MHz, that is 25 ns, and each step is ~~100ps.


Austin 

Austin Lesea
Principal Engineer
Xilinx San Jose
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Newbie akanekendo
Newbie
6,998 Views
Registered: ‎04-20-2009

Re: Can I get 10ps delay increment in V5?

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Hi Austin,

 

Thanks so much for looking into this. 

The shortest period available I assume would be 1/8 of the fastest VCO, which is 1/8/1440MHz, roughly 80ps. Or is it 1/256? That sounds too fast.

If the delay line can go down to 7ps to 30ps, how is that larger?

 

 

ak

0 Kudos
Scholar austin
Scholar
8,575 Views
Registered: ‎02-27-2008

Re: Can I get 10ps delay increment in V5?

Jump to solution

Hi,

 

The delay line has 256 taps.

 

If the input frequency has a period of 25.6ns, then each step is +/- 7 to +/- 30 ps of 100 ps (basically it will go to the nearest tap that is closets to the desired phase).

 

To do what you want (characterize the errors with phase shift), you can do this, stepping 1/256 of the period.

 

Some commands to step to the next phase will not actually do anything (there is no tap any closer than the one you are already on).  Or, it weill advnace to the next tap which is the best and closest phase to what you are asking for (may be just one step, or many).

 

Since you can not build an exact phase delay, the DCM provides a digital interface and control, and has logic to figure out how to do what you ask.

 

It isn't exactly what you wanted, but it will do what you want.  It will just not use the step size you desire.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose

View solution in original post