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iamadog3333
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Registered: ‎08-19-2009

Can not readback from opb HWICAP in XUPV2P--the readback status does not show DONE!

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Hi guys,
   I found a problem when using OPB-HWICAP.
   I builded a basic system containing a Softprocessor and the system's frequency was 50Mhz. HWICAP can works at 66Mhz.
In the bitgen.ut file, I set "-g M0Pin:PULLUP -g M1Pin:PULLUP -g M2Pin:PULLUP".
   Then I run "xhwicap_low_level_example.c" from the HWICAP's driver in IDE. It contains an example of how to use the low-

level macros and functions of the XHwIcap driver.
   When I run this file:
   XHwIcap_mSetBram(BaseAddress, Index, ReadId[Index]) excuted. Write bitstream to bram OK.
   XHwIcap_mSetSizeReg(BaseAddress, (XHI_EX_BITSTREAM_LENGTH<<2) -1) excuted. Write to the SIZE register OK.
   XHwIcap_mSetOffsetReg(BaseAddress, 0) excuted. Write to the OFFSET register OK.
   XHwIcap_mSetRncReg(BaseAddress, 0) excuted. Write a 0 to the RNC,begin transfer from the bram to the ICAP,OK.
   Waited until (XHwIcap_mGetDoneReg(BaseAddress) != 0), means DONE and transfer completed.
   XHwIcap_mSetSizeReg(BaseAddress, (XHI_EX_ONE_WORD<<2)-1) excuted, Write to the SIZE register OK.
   XHwIcap_mSetOffsetReg(BaseAddress, XHI_EX_BITSTREAM_LENGTH) excuted, Write to the OFFSET register OK.
   XHwIcap_mSetRncReg(BaseAddress, 1) excuted, initialize readback from the ICAP to the bram,OK.
   Wait until (XHwIcap_mGetDoneReg(BaseAddress) != 0)...
   Then comes the problem, the status register's DONE does not become "1" !!!

while (XHwIcap_mGetDoneReg(BaseAddress) == 0)
    {
        Retries++;
        if (Retries > XHI_EX_MAX_RETRIES)  //I even changed the XHI_EX_MAX_RETRIES from 100 to 10000.
        {                                  //But it still time out!!!
            /*
             * Waited to long. Exit with error.
             */
             print("waited too long!!!!\n");
            return XST_FAILURE;
        }
    }

The opb_xhwicap's version is 10_0_a. The chip is Virtex II Pro 30 V2P30 in XUP V2P30.
Question1:What's the prolem? Why HWICAP is busy so long?
Question2:Is 50Mhz too fast?
Question2:When use XHwIcap_mSetRncReg(BaseAddress, 0) writing a 0 to the RNC,begin transfer from the bram to the ICAP.
But the ICAP put the bram data to where in device? I did not even assign a place in the Chip!


Anyone has advice? Thank you ahead.

  

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iamadog3333
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Registered: ‎08-19-2009
The problem was solved! The main reason is some setting in bitgen.ut was wrong.I use the bitgen.ut file as follows, then it works! -g DebugBitstream:No -g Binary:no -g CRC:Enable -g ConfigRate:4 -g CclkPin:PullUp -g M0Pin:PullUp -g M1Pin:PullUp -g M2Pin:PullUp -g ProgPin:PullUp -g DonePin:PullUp -g PowerdownPin:PullUp -g TckPin:PullUp -g TdiPin:PullUp -g TdoPin:PullNone -g TmsPin:PullUp -g UnusedPin:PullDown -g UserID:0xFFFFFFFF -g DCMShutdown:Disable -g DisableBandgap:No -g DCIUpdateMode:AsRequired -g StartUpClk:CClk -g DONE_cycle:4 -g GTS_cycle:5 -g GWE_cycle:6 -g LCK_cycle:NoWait -g Match_cycle:Auto -g Security:None -g Persist:No -l -m -g ReadBack -g DonePipe:No -g DriveDone:No -g Encrypt:No HWICAP's IP version is 1.00b, the driver's version is 1.00a. For more information: iamadog3333@163.com Kudos! Thanks!

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iamadog3333
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Registered: ‎08-19-2009
The problem was solved! The main reason is some setting in bitgen.ut was wrong.I use the bitgen.ut file as follows, then it works! -g DebugBitstream:No -g Binary:no -g CRC:Enable -g ConfigRate:4 -g CclkPin:PullUp -g M0Pin:PullUp -g M1Pin:PullUp -g M2Pin:PullUp -g ProgPin:PullUp -g DonePin:PullUp -g PowerdownPin:PullUp -g TckPin:PullUp -g TdiPin:PullUp -g TdoPin:PullNone -g TmsPin:PullUp -g UnusedPin:PullDown -g UserID:0xFFFFFFFF -g DCMShutdown:Disable -g DisableBandgap:No -g DCIUpdateMode:AsRequired -g StartUpClk:CClk -g DONE_cycle:4 -g GTS_cycle:5 -g GWE_cycle:6 -g LCK_cycle:NoWait -g Match_cycle:Auto -g Security:None -g Persist:No -l -m -g ReadBack -g DonePipe:No -g DriveDone:No -g Encrypt:No HWICAP's IP version is 1.00b, the driver's version is 1.00a. For more information: iamadog3333@163.com Kudos! Thanks!

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