Clock in my FPGA

[guetguet]

Hello everyone,

I have realized a little counter in VHDL and I have tested it using modelsim. I thus generated the clock of my system by myself in the simulation. But, now, I want to implement my system in my FPGA and I would like to know how can I parameterize the clock frequency which will be used.

Could someone help me please.

Thanks a lot !

[gszakacs]

Most Xilinx FPGA's don't have built-in clocks.  Spartan 6 is an exception where you can

use the startup block to provide a clock after configuration is complete.  Otherwise you normally

have an onboard oscillator to generate some clock frequency (usually at least one that you need)

and possibly use the DCM or PLL resources to create other frequencies.

Are you using an evaluation board or kit?  If so you should be able to find the clock

frequency in the board documentation.  Then you can use the clocking wizard to generate

other frequencies if necessary.

-- Gabor