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Visitor owen_chen
Visitor
2,593 Views
Registered: ‎11-24-2010

Communications between V6 GTX and LVDS receiver

I use the Virtex-6 GTX to generate LVDS signal to test my LVDS receiver ability.

I use AC coupling to block the GTX DC bias and using pull-up resistors behine the AC capactor to a new DC bias and it works.

But when I sent a special LVDS pattern that including a long un-toggle DC-like signal, the AC-coupling capacitor will be charged due to the DC-like signal so that my LVDS receiver will received error signal.

 

The question is there any application IC or circuit able to change output common mode voltage of GTX?

 

Thanks

 

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Scholar drjohnsmith
Scholar
2,582 Views
Registered: ‎07-09-2009

Re: Communications between V6 GTX and LVDS receiver

this raises more questions than answers.

 

can you run the gtx on the virtex 6 to generate special patterns, or is encoding / stuffing always turned on ?

 

how do you test that your system works as you say ?

 

if you have series capacitors, then the effective DC levle is going to move deoendent upon the average DC of the signal,

    that is one reason why things like 4:5 encoding is used, to remove the DC.

 

alternatives that come to mind,

    you might be able to use a diff amp, which has a common mode input / output control pin,

        ADI make a few , but I don't think they will make the speed you need.

 

   you might be able to use three resistors,

        pull up to a voltage, pull down to a voltage, and a voltage divider, 

             if you can get the capacitance down enough,

                  take a look at the LVPECL to LVDS circuit here

 

http://www.interfacebus.com/Design_Translation.html

 

 

I must ask, just what are you trying to do, sounds facinating ..

 

 

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