06-23-2011 02:43 AM
Does Xilinx ISE contain the IP core or primitive that can config FPGA by other CPLD or FPGA ?
06-23-2011 03:52 AM
06-23-2011 06:38 PM
PC sends configuration data to an FPGA though PCIE interface IP core.
And if this FPGA receives this data, it sends these data to the other FPGA after an FIFO.
I use an FPGA to config the other FPGA, so there are two FPGAs.
06-23-2011 08:56 PM - edited 06-23-2011 08:58 PM
I don't think that any built-in cores or primitives will do everything for you. You could implement a simple slave serial controller and configure other FPGAs with that, though.
04-21-2014 04:20 AM
see this link it will give clear primitive detils