06-06-2011 10:50 PM
new to FPGAs need help interfacing a 10/100/1G w5300 ethernet to Virtex 5. Any links which will explain the same??
06-06-2011 11:43 PM
Virtex-5 does support Ethernet MAC. It uses gigabit transceivers in it to support physical layer. Hope you will get information in below link.
06-07-2011 07:51 AM
Just another point:
Whether or not you use the rocket IO, you still need an external Ethernet PHY chip. If you
use a PHY with GMII or RGMII connections, then you don't need the rocket I/O of the FPGA.
Only SGMII requires the rocket IO. However only the V5 parts that HAVE Rocket IO - the LXT parts -
also have the Built-in hard Ethernet MAC. Other V5 parts would need to use a soft core
06-07-2011 09:46 AM
The W5300 appears to be a complete TCP/IP solution in a module - these should be fairly straightforward to interface to an FPGA using parallel I/O. It'd probably be easiest to drive it from a program running on the PPC processor unless you have very modest requirements, such as just transmitting UDP packets and not caring about replies.
If you haven't already found information by Googling, there are probably not many examples or tutorials for doing this with an FPGA, since there aren't many (any?) popular development boards that use these modules. Naturally it's possible, and I do know someone who has used WizNet modules with a Spartan-3, but you'll have to study the datasheet and WizNet example code. Depending on your FPGA experience, this could be either an afternoon's work or a baffling six month journey of discovery.