Hello, I am neew to the board and VHDL programming in general so I hope to ask this in a clear and consice way. I am running ADC data from a FMC150 board and MSDPD board into seperate FIFOs (fmc_fifo and msdpd_fifo) in parallel, then running both data into a single FIFO (ping_fifo) which time aligns the data with a memory clock for the DDR memory on my ML605 FPGA board. I was successful in writting MSDPD data, but the data from the FMC150 board is giving me issues. I decided to hardcode the numbers 1 and 2 into the fmc_fifo and use the data clock from the FMC150 board to drive the FIFO write clock and data was written and the data was successfuly written through the ping_fifo then ddr memory and read from memory without issues. then I decided to use a counter to test further, and using the write clock i incremented a counter and sent it through the system. No data was output according to Chipscope. I decided to Chipscope the data path and found that the FMC fifo was reading and writting the data but then the ping_fifo had no output although the data was seen at the fifo input. I decided to run the write clock to the fmc_fifo with the same clock as the msdpd_fifo and the counter was then successful. Then I decided to Chipscope the fmc_clock used for the write clock of fmc_fifo and I saw that the clock did not have a 50% duty cycle. I am now worried that this is the issue. The clock is generated from the board and I'm not very certain that it is alterable. I am considering using clock wizard to generate a signal based on this clock but with a 50% duty cycle. Then again the data which I will use after the counter test is successful is driven by this weird clock so im not certain that this is even a good idea. Is there something I am overlooking? I used '1' for the write enable signal for both the msdpd and fmc fifos and the read enables are based on the read clock which is the same in both. This was successful for hardcoding data. Is there another wayI can get this system working? Thank you all help is extremely appreciated and if any details are unclear please feel free to ask.