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dklaus
Visitor
Visitor
11,387 Views
Registered: ‎06-27-2013

GTH

Hello

 

I have problems with GTH. What am I doing wrong? I've generated GTH core in Vivado with example design.

 

I ran the testbench and there is no "cdrlock" (this signal goes UP and DOWN)?

 

what could be the problem?

 

 

 

on a real board the  sitiation is the same.

 

 

 

-thanks in advance

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vsrunga
Xilinx Employee
Xilinx Employee
11,371 Views
Registered: ‎07-11-2011

Hi,

 

What is your core configuration and to which clock are you trying to lock the CDR

Had a chance to try the below links?

 

http://www.xilinx.com/support/answers/38550.htm

 

http://www.xilinx.com/support/answers/40810.htm

 

 

 

Regards,

Vanitha.

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dklaus
Visitor
Visitor
11,357 Views
Registered: ‎06-27-2013

Hi,

 

My device is xc7vx690t.

 

I want the CDR (Clock and Data Recovery) to be locked to incoming data.

I use ISE 14.7.

 

no coding used (8b10b or 64b66b), no comma detection used. just "raw" GTH.

 

as a result CDRLOCK is not stable "1" 

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venkata
Moderator
Moderator
11,344 Views
Registered: ‎02-16-2010

Better approach to understand the CDR is locked is to send a known character and monitor the incoming data.
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dklaus
Visitor
Visitor
11,313 Views
Registered: ‎06-27-2013

yeahhhh. finaly it works! 

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