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Observer
Observer
2,561 Views
Registered: ‎05-17-2010

MIG Addressing issue

Hi, All

 

I am using MIG DDR2 in V5 device. And I have a little questions of MIG addressing

 

Suppose my MIG is 64bit, and burst length is 4  and I want to write continuous space in memory

How should I increase the app_af_addr?

Must the app_af_addr 4QW align?

 

Thanks

 

 

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Xilinx Employee
Xilinx Employee
2,525 Views
Registered: ‎10-23-2007

I'm not sure what you mean by 4QW.  In general, the MIG V5 DDR2 design just passes through the full address to the memory.  Thus, you'd want access addresses 0, 4, 8, 12, 16 (in decimal) and so on to write to the continuous address space.

 

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