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Visitor sudhirnaik
Registered: ‎03-11-2010

OBUFDS at 500MHz

I am using xc5vlx30 fpga. I have a 500MHz clock out of a pll  and driving a OSERDES (8:1) . The output of the OSERDES (which is effectively at 1GBps) is connected to OBUFDS to get a LVDS o/p . The LVDS o/p works perfectly for me in simulation. I also have the 500 MHz clock connected to a OBUFDS to get a LVDS clock output . But the place and route simulation shows me that the  o/p clock is not toggling ?? Am i doing something wrong here? 

There is another strange thing i noticed here. If i connect the same clock through a OBUF(as a CMOS o/p) ,it works fine. 

Also i tried the following thing


OBUFDS #(.IOSTANDARD("DEFAULT") // Specify the output I/O standard
    ) OBUFDS_A (
        .O(CLK_p), // Diff_p output (connect directly to top-level port)
       // .OB(CLK_n), // Diff_n output (connect directly to top-level port)
        .I(CLK_500M) // Buffer input


I commented the  .OB o/p and ran the simulation and see that the CLK_p is toggling at 500MHz. Plz help

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Visitor sudhirnaik
Registered: ‎03-11-2010

Re: OBUFDS at 500MHz

Hi all

I just used another OSERDES (8:1) with inputs 8'b10101010 to get the clock output. But i am still curious as to what was wrong in my initial design .. any comments/suggestions would be great .thanks

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