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Observer tpaskys
Observer
3,957 Views
Registered: ‎11-28-2011

Partial Reconfiguration Abort with ICAP

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I am using a Virtex4 FPGA; in some situations i want to abort a partial reconfiguration process to restart from zero the reconfiguration with a new bitstream. I use the ICAP interface. I read in Virtex4 configuration user guide that ICAP is similar to Select MAP interface. In Select MAP i can abort the configuration by de-assert WRITE signal while CS signal is asserted, so WRITE=1 and CE=0; then abort sequence lasts four clock periods.

For ICAP interface is it the same? I de-assert WRITE signal while CE signal is asserted, then wait  4 clocks and then de assert CE, so i can restart the reconfiguration process nomally?

 

PT

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Scholar austin
Scholar
4,988 Views
Registered: ‎02-27-2008

Re: Partial Reconfiguration Abort with ICAP

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t,

 

ICAP is a 2:1 mux, basically.  So, whatever you can do externally, you should also be able to do internally.  Remember that there is only one configuration interface, so if you need JTAG for Chipscope, etc. ICAP may be blocked, and not respond.  The same is true if you have two designs that both need ICAP:  you will need to modify your design to manage access to the ICAP -- ICAP is not smart enough to do it for you.

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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Scholar austin
Scholar
4,989 Views
Registered: ‎02-27-2008

Re: Partial Reconfiguration Abort with ICAP

Jump to solution

t,

 

ICAP is a 2:1 mux, basically.  So, whatever you can do externally, you should also be able to do internally.  Remember that there is only one configuration interface, so if you need JTAG for Chipscope, etc. ICAP may be blocked, and not respond.  The same is true if you have two designs that both need ICAP:  you will need to modify your design to manage access to the ICAP -- ICAP is not smart enough to do it for you.

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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