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Visitor czhangaz
Visitor
11,433 Views
Registered: ‎05-07-2015

Power issue -- junction temp exceeded V707

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Hi,

 

I have been using vivado for only one month and really new to that. After I implemented a quite big design, I get warnings on the power issue. 

power.png

I am really shocked by the warning. The temp and power estimations are really amazing. That is kind of reasonable because the utilization is quite large. Now I really need some help on this. Is there any problem about this power estimation? How can I reduce the power wthout lowering the operating frequency? 

I've tested this project on board. It works well. However, I am afraid it will break down as I keep doing this.

 

Many Thanks!

 

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Scholar austin
Scholar
20,464 Views
Registered: ‎02-27-2008

Re: Power issue -- junction temp exceeded V707

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c,

 

What is the junction temperature, say after 5 minutes and ten minutes of operarion.

 

As long as it is below the absolute maximum values in the data sheet you are just fine.

 

And yes, the power predicted is wrong.  May be a bug.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose

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Professor
Professor
11,429 Views
Registered: ‎08-14-2007

Re: Power issue -- junction temp exceeded V707

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Something is clearly wrong with the power estimate if this design is actually working on your board.  I'm not aware of any eval boards with 500W power supplies.  Generally speaking:

 

1) The board power supply will give out before you can dump this much power into the chip.  Usually a dip in the Vccint will cause the FPGA to lose its configuration and cool down very quickly.

 

2) You can enable auto-shut-down on overtemperature in the configuration options if you want to be sure not to fry the chip.

-- Gabor
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Scholar austin
Scholar
20,465 Views
Registered: ‎02-27-2008

Re: Power issue -- junction temp exceeded V707

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c,

 

What is the junction temperature, say after 5 minutes and ten minutes of operarion.

 

As long as it is below the absolute maximum values in the data sheet you are just fine.

 

And yes, the power predicted is wrong.  May be a bug.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose

View solution in original post

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Visitor czhangaz
Visitor
11,348 Views
Registered: ‎05-07-2015

Re: Power issue -- junction temp exceeded V707

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Good advice, Gabor!

 

I've enabled that option. :)

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Visitor czhangaz
Visitor
11,345 Views
Registered: ‎05-07-2015

Re: Power issue -- junction temp exceeded V707

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Thanks Austin!

 

But I still have a question that, how can I get the junction temperature after 5 minutes? Really having no idea about that...embarrassed...

 

I agree with you, yes it may be a bug. When I raise the frequency from 50Mhz to 100Mhz, the power jumps to 6000W, that means the board is running like a high-powered air-conditioner. WoW

(Besides, the design did not work under 100Mhz, I think I need to improve the timing.)

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Scholar austin
Scholar
11,302 Views
Registered: ‎02-27-2008

Re: Power issue -- junction temp exceeded V707

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c,

 

Use the JTAG interface to the board.  ISE or Vivado support getting the Tj when the devise is connected to, and reported back.

 

I use Vivado hardware manager.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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Xilinx Employee
Xilinx Employee
11,287 Views
Registered: ‎01-03-2008

Re: Power issue -- junction temp exceeded V707

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It is impossible for the device to require 500W or 6000W of power, so there must be something weird happening with the power calculation. 

 

Can you please post the contents of the Power Report?  In Vivado select the Report tab at the bottom and then the Power Report under Route Design. either attached it as a file to your post or use the code insertion button that is the "{i}" in the tool bar and to copy and paste it. 

 

As for the measuring the actual junction temperature of the device.  You can use the Vivado Hardware Manager (aka ChipScope) to look at the temperature but double clicking on the System Monitor function in the device.

------Have you tried typing your question into Google? If not you should before posting.
Too many results? Try adding site:www.xilinx.com
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Visitor czhangaz
Visitor
11,254 Views
Registered: ‎05-07-2015

Re: Power issue -- junction temp exceeded V707

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Thanks mcgett.

 

I just find out what was wrong. I didn't set any timing constraint before this. After I set the creat_clock to 200Mhz, just as the global clock on the chip, vivado give me the power estimation at around 5W and temp around 30 degree C.

 

Vivado is quite different from ISE. Still learning. :)

 

 

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Xilinx Employee
Xilinx Employee
11,234 Views
Registered: ‎01-03-2008

Re: Power issue -- junction temp exceeded V707

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It is extremely important to set timing constraints for every design, because without timing constraints the place and route tools will do a simple quick pass at the design and then stop.  This will result in a design that generally does not work due to real world timing violations from the clock that you are providing to the FPGA.

------Have you tried typing your question into Google? If not you should before posting.
Too many results? Try adding site:www.xilinx.com
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