01-02-2015 05:09 PM
I'm using a Virtex-5 FPGA and I just had a question regarding the usage of the I/O pins. I am using the Bank 11 in order to get an output from a pin and an input to the pin. I've set them as LVTTL standard but I only get 1.5V on the pin. Is there a reason for it ? I still haven't given a 3.3V input but I'm unsure now if I can give a 3.3V LVTTL standard on the pin. This is also in the same Bank 11. Thanks!
01-02-2015 07:52 PM
While the I/O standard is supposed to reflect the output voltage of the I/O, it is really the VCCO for the bank that determines this. Thus, programming a pin as LVTTL will only result in a 3.3V signal swing if the VCCO of that bank is driven wth a 3.3V supply.
So, if you are only getting 1.5V out of the pin, there are two possible reasons
1) Something is wrong with your VCCO. If this isn't 3.3V, then the pin will not be able to drive to 3.3V
2) There is something else driving the pin in addition to the FPGA. If the pin transitions between 0V and 1.5V, then it is likely that there is another driver that is trying to hold the pin at 0V. This can happen due to a board design error, or a manufacturing error (the pin is shorted to another pin).
It is important to understand which of these this is. If it is 2), then you can safely drive a 3.3V input to the bank. If it is 1), though, driving an input to 3.3V will forward bias the protection diode on the pin (which is connected to VCCO), and could damage the protection diode.
01-02-2015 07:57 PM
Thanks for the response! So if the VCCO to that particular bank is 1.5V, then we cannot drive an input of 3.3V to the bank either ?
01-03-2015 12:11 AM