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Visitor
Visitor
4,249 Views
Registered: ‎06-03-2009

Virtex 5-ML505 Evaluation Board: Configure differential TXP and TXN into Single-ended outputs?

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Hi all,

 

I am new to FPGAs.  We have been looking for ways to configure the TXP and TXN (SMA outputs) to be single-ended rather than differential 200 Mbps data streams.  While we are able to adjust the data rate (200 Mbps, 1 Gbps, or 1.5 Gbps), we are unable to configure it to be single-ended.  Does Virtex 5, or the ML505 eval board support this possibility at all?

 

 

Thanx!

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Xilinx Employee
Xilinx Employee
5,246 Views
Registered: ‎01-03-2008
The GTP TXP/TXN outputs and RXP/RXN inputs are always differential
Message Edited by mcgett on 06-03-2009 09:21 PM
------Have you tried typing your question into Google? If not you should before posting.
Too many results? Try adding site:www.xilinx.com

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Xilinx Employee
Xilinx Employee
5,247 Views
Registered: ‎01-03-2008
The GTP TXP/TXN outputs and RXP/RXN inputs are always differential
Message Edited by mcgett on 06-03-2009 09:21 PM
------Have you tried typing your question into Google? If not you should before posting.
Too many results? Try adding site:www.xilinx.com

View solution in original post

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