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Visitor dielacher
Visitor
5,207 Views
Registered: ‎03-12-2009

Virtex 5 - SYSMON simulation

Hi everyone,

 

I'm currently playing around with the system monitor timings. I'm running the ADC in sequencer mode with averaging. In the simulation, I can read and write over the DRP interface regardless of the busy signal, which is in contrast to the System Monitor User Guide (ug192). After a read operation (DWE = 0, DEN = 1) is initiated, the data is available 10 clock cycles after. Is the simulation model correct and i misread the User Guide?

 

Best regards,

Andi

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3 Replies
Explorer
Explorer
5,200 Views
Registered: ‎09-11-2007

Re: Virtex 5 - SYSMON simulation

You might have mentioned the page number where you read this information in ug192.

 

I use the V5 system monitor in continuous sequence with averaging, and I completely ignore the BUSY signal; I left it open.  It works fine in simulation as well as hardware.

 

Barry

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Visitor dielacher
Visitor
5,174 Views
Registered: ‎03-12-2009

Re: Virtex 5 - SYSMON simulation

It was page 35/36, but i think i found my mistake. I first thought, i need to check the busy signal, if i may write to the sysmon. But actually, I can write whenever I want and the data is latched into the configuration registers only when busy goes low (and reading from a register is no problem at all).

 

Andi 

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Visitor omar.ejv
Visitor
2,922 Views
Registered: ‎04-29-2011

Re: Virtex 5 - SYSMON simulation

Hello,

 

I have used the SYSMON to measure voltage of Vccint and current using xilinx tools without any problem. Now I need to access sysmon registers directly using the DRP.

Using parallel IV cable I wrote a program to control the TAP FSM, I successfully got the IDCODE as a test, however when I try to access the SYSMON registers I always get the same value 0x10840000.

 

According to the documentation (XAPP139 and UG192) the sequence to get data from registers using jtag DRP is:

 

- Access SYSMON instruction (1111110111) in SHIFT-IR state.

 

- goto SHIFT-DR and enter a 32 bits instruction to read:

  The following is an instruction to read Vccint max (register 21h)

 

   DRP_CMD     ADDR DATA
Read Vccint max DRP COMMAND: XX[00 01][00 0010 0001] [0000 0000 0000 0000]
- wait for some cycles in RUN-TEST-IDLE.
- read register 32-bit data in SHIFT-DR state / it's possible to write simultaneously another write instruction and read later for sequential reading of registers
Note: I shift the SYSMON instruction and the DRP command starting from the LSB, and in the MSB I set TMS=1 to exit to EXIT1-IR/DR respectively.
I can see from this thread that you were able to access SYSMON registers, could you tell me if I'm doing something wrong here?
Thanks in advanced for your support,
Omar Jimenez

 

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