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wooshishui
Observer
Observer
3,712 Views
Registered: ‎07-16-2008

Virtex4FX XC4VFX100 FF1152 Clock Capable I/Os

I want to connect the Clock Capable (CC) I/Os to an external clock and drive some other I/Os of the Virtex 4.

Is there some constraints for it?

 

I means it is possible to drive any I/Os of that FPGA.? How?

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3 Replies
ywu
Xilinx Employee
Xilinx Employee
3,690 Views
Registered: ‎11-28-2007

Not sure if I understand your questions. Virtex4 has 3 IO columns. Avoid using the CC IOs in the center IO column. Also keep in mind that CC IOs can only drive IOs/logic in up to 3 clock regions.

 

Cheers,

Jim

 

Cheers,
Jim
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wooshishui
Observer
Observer
3,685 Views
Registered: ‎07-16-2008

Thanks for your replay.

How is the relation between IO columns, IO bank, clock region?

 

What do you mean with 3 clock regions? 3 neighbourhood clock regions or 3 any clock regions?

 

 

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ywu
Xilinx Employee
Xilinx Employee
3,672 Views
Registered: ‎11-28-2007

Please take a look at the "Regional Clock Resources" section of the Virtex4 user guide (http://www.xilinx.com/support/documentation/user_guides/ug070.pdf) . Please ask if you still have questions after reading it.

 

Cheers,

Jim

Cheers,
Jim
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