03-10-2010 05:34 AM
I have two PCB boards with an XC5VSX95T on each board, and four MGTs’s TX of fpga1 is connected with four MGTs’s RX of fpga2,so I have eight GTPs to channel bonding. Now the fpga1’s GTPs are designed to use a txoutclkout to drive eight txusrclk_in,I use chipscope to test tile_txdata_i is true and eight lanes are aligned,but in fpga2 I test eight tile_rxdata_i are not aligned ,because I have no more DCM to use,so I use a rxrecclkout to drive eight rxusrclk_in. I want to know how to align the eight lines?Must every lane be drived by itself's rxrecclk?
03-10-2010 12:39 PM
03-11-2010 07:07 AM
03-11-2010 08:00 AM
It is fine for a channel-bonded link to go between boards. The MGTs on both boards need to have a REFCLK source and the frequency of these two clocks must be within 100ppm.
If the channel-bonded protocol used 8b10b encoding, clock correction then there is no need to use RXRECCLK.
03-23-2010 07:08 AM