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Anonymous
Not applicable
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could TXUSRCLK(RXUSRCLK) of GTP come from CLB, not BUFG?

since there are 32 BUFGMUX in V5. It is a little small for my application. 

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Xilinx Employee
Xilinx Employee
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Registered: ‎01-03-2008

The USRCLKs will also be used for data paths which will have a lot of loads these need to be on global clocks.
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Anonymous
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Thanks for your reply.

Something confuses me now. When i use GTX(V5) with TX/RX buffer mode, is it necessary to emply (TXOUTCLK + BUFR) to drive TXUSRCLK, RXUSRCLK,  TXUSRCLK2 and RXUSRCLK2? GTX would not work normally, even when TXOUTCLK + BUFG  drive the above 4 signals. And It would not work that  TXOUTCLK + BUFR drives TXUSRCLK and TXUSRCLK2,  RXCRCCLK + BUFR drives RXUSRCLK and RXUSRCLK2,

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Xilinx Employee
Xilinx Employee
4,032 Views
Registered: ‎01-03-2008

I read your post a few times, but I can't understand what your question is. I would suggest that you try using the GTX wizard ad a tarting point for your design.
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