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Observer
Observer
3,176 Views
Registered: ‎02-21-2011

how to initialize BRAMs of virtex5 FPGA

hello

 

few days ago i started to work with virtex5 board ..i'm trying to implement a design in this FPGA...my design contains ram components....with other FPGA vendor, i do it using a .mif file (memory initialization file) so it is very simple to do it..i worked also with spartan family, but i found many problems because of the be (byte enable) signal, so i was obliged to select the right bloc of evry byte... my question is, is it the samething with virtex5 FPGA? how to initialize the memory bloc of this FPGA?

with other FPGA vendor, i used a mif file, i juste specify the width and the depth of the ram, i specify the segments and the value of each address, i can also set the remain unused memory with zeros...so can i do the same think with the virtex5 ??

 

thank you in advance

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Scholar
Scholar
3,170 Views
Registered: ‎02-27-2008

google:

initializing bram contents -forum filetype:pdf site:xilinx.com

And start reading, it is all there.
Austin Lesea
Principal Engineer
Xilinx San Jose
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Advisor
Advisor
3,158 Views
Registered: ‎12-03-2007

Hi, 

 

I'm familiar with the following methods of initializing a BRAM:

 

1. COE file passed to a generated core containing BRAMs

2. Directly in the code using INIT_## parameters passed to BRAM instances

    for example:  

        RAMB36E1

               #(.INIT_00(256’h1234),

 

3. From FPGA Editor

4. Using data2mem utility + running a bitgen. That method might be the most suitable for you.

 

 

Thanks,

Evgeni

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