06-30-2011 05:27 AM
few days ago i started to work with virtex5 board ..i'm trying to implement a design in this FPGA...my design contains ram components....with other FPGA vendor, i do it using a .mif file (memory initialization file) so it is very simple to do it..i worked also with spartan family, but i found many problems because of the be (byte enable) signal, so i was obliged to select the right bloc of evry byte... my question is, is it the samething with virtex5 FPGA? how to initialize the memory bloc of this FPGA?
with other FPGA vendor, i used a mif file, i juste specify the width and the depth of the ram, i specify the segments and the value of each address, i can also set the remain unused memory with zeros...so can i do the same think with the virtex5 ??
thank you in advance
07-01-2011 05:48 PM
I'm familiar with the following methods of initializing a BRAM:
1. COE file passed to a generated core containing BRAMs
2. Directly in the code using INIT_## parameters passed to BRAM instances
3. From FPGA Editor
4. Using data2mem utility + running a bitgen. That method might be the most suitable for you.