I’m doing dynamic partial reconfiguration
with EAPR method. When I copy system.ace and two partial bitstream files into
the CF card, the design only works the initial configuration. The software runs
well but I can’t exchange the partial configurations p1.bit and p2.bit. I use
XHWICAP_CF2ICAP(&myicap, p1.bit) function to read the partial bitstream.
searched on the net ,some people said maybe the partial region has problem, or
the icap has problem to read partial bitstream. If there is something wrong
with the bit file ,how to check it ?
Another user have already solved it
(paolo.furia) he say:
----In Xilinx Platform Studio, I go to my software
application project and then on "Set Compiler Options...". On the
"Environment" tab I select "Use Default Linker Script" and
put 0x50 in "Program Start Address" and 4096 in "Stack
Size". Using these options the system can read from Compact Flash every
type of file. I copied them from a reference project found on Xilinx website
But it do not function me, anyone could help please?
Xilinx tools I used are EDK 9.1.02i and ISE 9.1.02i _PR10 .