05-17-2014 07:43 AM
I am doing FPGA validation on ML605 with virtex 6 gtx transceiver.
After OOB and speed negotiations, when actual transfers started, we are seeing disparity and decode errors on rx lines.
But received data's CRC is corrected.
Are we getting these errors because of RX Equlazation settings?
if so kindly post me the RX and TX setting for virtex 6 gtx phy.
05-18-2014 09:00 PM
05-18-2014 10:37 PM