07-16-2015 06:52 AM
My name is P Dasarath.
I have working on a project with following fpga board configuration.
VIRTEX6 XC6VLX240T FF1156 with Speed grade -1 ( ML605 evalution board).
for Gen1 and Gen2 of SATA used the above configuration. It s working fine.
For Gen3 the above board is not supporting, so i moved to VIRTEX6 XC6VLX240T FF1156 with Speed grade -3.
Every thing is same except the SPEED GRADE.
My question is Can i use the same pin locations for both configuration ( speed grade -1 and -3).
I mean does the both boards ( speed grade -1 and -3 ) have the same pin structure ?
Kindly respond as soon as possible.
07-16-2015 07:20 AM
Did you syntehsize, place and route the design with new constraints to match the need for the higher speed?
07-29-2015 09:46 AM
08-24-2015 02:10 PM
Speed Grade (-1, -2, -3 ,...) influences a variety of "Timing parameters" in the FPGAs. In modern Xilinx FPGA products, the higher numbers are faster. When you switch to a faster speed grade, it will affect ONLY the timing parameters and it is independent of pin locations...