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Posts: 12
Registered: ‎05-25-2015

AXI DMA v6.03a - Error Interrupt integrating with Custom AXI Stream IP


I have been trying to integrate a Custom AXI Stream IP with AXI DMA v6.03a. However, on starting the data transfer, the AXI DMA status shows the Internal error and Error Interrupt bit to be 1.


The steps followed for implementation:


1. I have connected a Custom AXI Stream to the S_AXIS_S2MM port. The input data is supposed to be written to the destination address in the DDR3 SDRAM.

2. In SDK, I have used the XAxiDma_CfgInitialize(DeviceId) to initialize the XAxiDma instance. There, I have checked the Buffer Descriptor for Rx and Tx channels. The base address and the number of channels for each is as implied to be.

3. The number of Rx channels is supposed to be 1. Using S2MM_DMACR I have set the DMA to be running.

4. Using S2MM_DA and S2MM_LENGTH I have set the required Destination Address and the transfer length. 


On this the transfer begins. I am continually pinging the S2MM_DMASR and there I have observed that the Internal Error and Error Interrupt bit is set to 1, indicating error. 


The PG021_AXI_DMA says that internal error occurs due to the Buffer descriptor length being 0. xil_printf on Rx channel Buffer Descriptor destination address and Buffer length shows that they are actually 0.


I am unable to understand why this should happen as I have set the Rx Channel Buffer Descriptor register fields.





AXI DMA v6.03a - Error Interrupt integrating with Custom AXI Stream IP