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Observer yqgeng102
Observer
3,158 Views
Registered: ‎04-11-2012

Planahead I/o assignment problem

Hi there

 

when I worked on the I/O location assignment, a problem occurred. I need to locate a pair of input diff  clock , but after I chose 'place I/O ports sequentially', all global clock showed 'already occupied'. I was totally confused. I hope anyone of you can help me solve it. Many thanks!

 

Y

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2 Replies
Observer yqgeng102
Observer
3,139 Views
Registered: ‎04-11-2012

Re: Planahead I/o assignment problem

anyone can help? My project is stucked here.

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Xilinx Employee
Xilinx Employee
3,135 Views
Registered: ‎01-03-2008

Re: Planahead I/o assignment problem

Are you creating a real design targeting a real board or is this just an expirement.

 

If this needs to work on a real board then you should be explicitly placing all of the IO components so that it matches the fixed pinout of the board.

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