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Observer
Observer
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Registered: ‎03-28-2020

如何使用Vitis_Accel_Examples文件夹下hello world例程中的Makefile文件

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想通过Vitis_Accel_Examples的hello world例程来学习如何使用vitis,可是在Makefile时出现了下面的错误 命令:make all TARGET=hw DEVICE=/zcu104_base.xpfm SYSROOT=/home/test/zynq_ultrascale_sdk/sysroots 错误:unsupported memory access on variable ‘in1‘ which is an array with unknown size at compile time 所以,我想问一下,在Vitis_Accel_Examples中的hello world 例程中的Makefile应该如何使用???我想体验一下vitis的全流程,把这个hello world在zcu104上运行出来 谢谢您的查看和回复
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Moderator
Moderator
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Registered: ‎08-20-2018

Hi @Ztone 

EDGE_COMMON_SW needs to be set in 2020.1.

Looks like you are using 2020.1 makefile with 2019.2 tool.

Please use the 2019.2 branch of Vitis Accel examples Github repo.

https://github.com/Xilinx/Vitis_Accel_Examples/tree/2019.2 

Best Regards,
Nutan
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Observer
Observer
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Registered: ‎03-28-2020

I want to ask the question that how to operate the Makefile of hello  world in Vitis_Accel_Examples . The follow command and error is my operation

the command for hello world examplethe command for hello world exampleerror for above commanderror for above command

thanks for your reply!

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Moderator
Moderator
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Registered: ‎08-20-2018

Hi @Ztone 

For SoC platforms:

cd <PATH TO SAMPLE APPLICATION>
make all TARGET=<sw_emu|hw_emu> DEVICE=<FPGA platform> HOST_ARCH=<aarch32/aarch64/x86> SYSROOT=<sysroot_path>

 

HOST_ARCH = aarch64 for ZCU104

SYSROOT path should be <sysroot path>/sysroots/aarch64-xilinx-linux

 

Please do the above changes and check if the issue gets resolved.

Best Regards,
Nutan
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Observer
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Registered: ‎03-28-2020

Thanks for your reply. I do these steps as you described ,SYSROOT is included the aarch64-xilinx-linux,but a new situation is appeared ,how to set/define the  EDGE_COMMON_SW variable

vitis_hello_world_error.png

Look forward to your reply again!

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Moderator
Moderator
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Registered: ‎08-20-2018

Hi @Ztone 

EDGE_COMMON_SW needs to be set in 2020.1.

Looks like you are using 2020.1 makefile with 2019.2 tool.

Please use the 2019.2 branch of Vitis Accel examples Github repo.

https://github.com/Xilinx/Vitis_Accel_Examples/tree/2019.2 

Best Regards,
Nutan
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Observer
Observer
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Registered: ‎03-28-2020

Yeap,i am using an error version for Vitis_Accel_examples,so i change Vitis_Accel_example verison to 2019.2. Then, I use the command to make the hello_world example and it's success:

$ make all TARGET=hw_emu DEVICE=/tools/Xilinx/Vitis/2019.2/platforms/zcu104_base/zcu104_base.xpfm HOST_ARCH=x86 SYSROOT=/home/test/zynq_ultrascale_sdk/sysroots/

But when I want to check this compiled example,an new error is appear as following picture

make check时出错make check时出错

How can I solve this problem

Looking forward to your reply

Thanks~

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Moderator
Moderator
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Registered: ‎08-20-2018

Hi @Ztone 

In your make command, HOST_ARCH and SYSROOT options are incorrectly set.

Please update it as shown below.

HOST_ARCH = aarch64 

SYSROOT path should be <sysroot path>/sysroots/aarch64-xilinx-linux

$ make all TARGET=hw_emu DEVICE=/tools/Xilinx/Vitis/2019.2/platforms/zcu104_base/zcu104_base.xpfm HOST_ARCH=aarch64 SYSROOT=/home/test/zynq_ultrascale_sdk/sysroots/aarch64-xilinx-linux

 

Best Regards,
Nutan
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Observer
Observer
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Registered: ‎03-28-2020

When assigned the HOST_ARCH=aarch64 during make all...,another error is appear as following picture ,CL/cl2.hpp:No such file or directory. But when assign HOST_ARCH=x86,compile process is OK,no error occured

So,my question is how to slove this problem

and HOST_ARCH parameter is refer to my computer architecture or ZCU104 architecture???

HOST_ARCH=aarch64HOST_ARCH=aarch64

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Observer
Observer
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Registered: ‎03-28-2020
I am solved my problem ,because my SYSROOT and HOST_ARCH parameter is error.when I correct as SYSROOT=/home/test/petalinux_sdk/sysroot/aarch64-linux-xilinx and HOST_ARCH=aarch64. Thanks your reply