07-04-2021 04:21 AM
I have some questions about controlling the Vivado implementation in Xilinx Vitis:
1)I would like to know how to specify in Xilinx Vitis (using a configuration file during the linking process) a different directive for the phys-opt-design during post-place and post-route.
Given the properties specified above, I cannot see if this is applied to the post-route or the post-place phase. The post-place has more directives options, e.g. what happen at post-route phase if I select AlternateReplication (only available at post-place)?
I have the same issue for enabling the power_opt_design before place and after post-place.
2) How can I specify multiple implementations run in the same .cfg file? Is it sufficient to write impl_1, impl_2 etc.?
3)The commands are shown below also run the Default one. How can I disable the Default implementation?
4) Is there a guide to use the incremental implementation in Vitis, or is it easier to do it directly in Vivado?
07-04-2021 05:23 AM
1) You can just try to enable the different steps in Vivado and check the tcl command printed in TCL CONSOLE.
Ex：For post route phys_opt: POST_ROUTE_PHYS_OPT_DESIGN
You can check the log in the generated Vivado project to see whether the settings takes effect.
2). Example cfg:
3）It looks you cannot skip the default strategy run.
4). You can just add the below command in TCL.PRE of place_design.
read_checkpoint -incremental XX.dcp
(For the detailed info, please refer to UG904)