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Observer
Observer
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Registered: ‎05-08-2016

Create Unified Software Platform with Vivado 2019.1

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Traditionally when trying to edit the PS logic in Xilinx SDK for Vivado 2019.1, you'd go to:

File --> Export Hardware --> Include Bitsream

Then:

File --> Launch SDK

Then the SDK would show up, so you can edit main.c to your hearts content--all while "xparameters.h" in Xilinx SDK, would reflect the exact same Address Editor generated by the Block Diagram window in the PL. However, I can't even get Vitis SDK to export my hw source correctly. And as far as I know, for 2019.1 Vivado, I never needed to create the xsa/dsa (just needed to export hardware, include the .bit file properly and open xil sdk). Where is this xsa/dsa file generated once the hardware is exported properly in Vivado? To the left, you'll see nothing under the hw source folder:

pls halppls halp

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Adventurer
Adventurer
867 Views
Registered: ‎09-17-2018

Hello!

The exported hw design should be in main folder of your vivado design. Also if you can't find it try writing something like this in tcl console: "write_hw_platform -include_bit /some/location/on/harddrive/name.xsa"

And then launch vitis and create new platform project from that generated  .xsa file

PS. If you are trying to make platform for Vitis from vivado 2019.1 I dont think that possible because of changed software technology. Vitis should have included vivado 2019.2.

You could try to write_tcl from your Vivado2019.1 project and update it to 2019.2 and then use new .xsa in Vitis

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Highlighted
Adventurer
Adventurer
868 Views
Registered: ‎09-17-2018

Hello!

The exported hw design should be in main folder of your vivado design. Also if you can't find it try writing something like this in tcl console: "write_hw_platform -include_bit /some/location/on/harddrive/name.xsa"

And then launch vitis and create new platform project from that generated  .xsa file

PS. If you are trying to make platform for Vitis from vivado 2019.1 I dont think that possible because of changed software technology. Vitis should have included vivado 2019.2.

You could try to write_tcl from your Vivado2019.1 project and update it to 2019.2 and then use new .xsa in Vitis

View solution in original post