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Observer
Observer
9,315 Views
Registered: ‎04-02-2015

Error : Run 'synth_1' has not been launched

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Hi 

 

I am facing following error during build_system. 

 

Note : vivad_hls phase is successful, this error occurs during vivado phase.

 

 

ERROR: [Common 17-69] Command failed: Run 'synth_1' has not been launched. Unable to open

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Observer
Observer
15,048 Views
Registered: ‎04-02-2015

@ywu 

 

I will send a private mail on this.

View solution in original post

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Xilinx Employee
Xilinx Employee
9,300 Views
Registered: ‎10-24-2013

Hi @kaliuday
Please post the complete vivado log.

Thanks,Vijay
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Observer
Observer
9,235 Views
Registered: ‎04-02-2015

Hi @vijayak

 

PFA, log here. 

 

synth_1 completes and runme.log is empty as such. 

 

 

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Xilinx Employee
Xilinx Employee
9,222 Views
Registered: ‎10-24-2013

Hi @kaliuday

 

Can you please try creating the project from scratch and see if that helps?

Thanks,Vijay
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Observer
Observer
9,218 Views
Registered: ‎04-02-2015

sure I will try that out. 

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Xilinx Employee
Xilinx Employee
9,169 Views
Registered: ‎10-24-2013

Hi @kaliuday

Do you have any updates?

Thanks,Vijay
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Observer
Observer
9,163 Views
Registered: ‎04-02-2015

Hi Vijay,

 

SDAccel version 2015.4

 

I created a new project and built again still error persists. FYI, this is a OpenCL kernel with single thread of execution. 

To verify the behaviour, I have ported it as HLS kernel, build goes through and passes timing. During the execution it hangs.

(FPGA configured with DSA 2.1 firmware)

 

SDAccel version 2015.3 :

 

I built both HLS & OpenCL kernels using 2015.3, build goes through fine and timing passes for both the kernels. I could execute the kernels successfully on board. (FPGA configured with DSA 2.0 firmware)

 

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Xilinx Employee
Xilinx Employee
9,123 Views
Registered: ‎11-28-2007

@kaliuday

 

Who is your Xilinx contact? Please work with him/her and copy me on the email (ywu at xilinx dot com).

 

 

 


@kaliuday wrote:

Hi Vijay,

 

SDAccel version 2015.4

 

I created a new project and built again still error persists. FYI, this is a OpenCL kernel with single thread of execution. 

To verify the behaviour, I have ported it as HLS kernel, build goes through and passes timing. During the execution it hangs.

(FPGA configured with DSA 2.1 firmware)

 

SDAccel version 2015.3 :

 

I built both HLS & OpenCL kernels using 2015.3, build goes through fine and timing passes for both the kernels. I could execute the kernels successfully on board. (FPGA configured with DSA 2.0 firmware)

 


 

Cheers,
Jim
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Observer
Observer
15,049 Views
Registered: ‎04-02-2015

@ywu 

 

I will send a private mail on this.

View solution in original post

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Observer
Observer
7,061 Views
Registered: ‎10-06-2016

I encountered two similar variants of this issue with 2016.1

 

a) Like kaliuday:

Run 'synth_1' has not been launched. Unable to open

synth_1 runme.log empty

Fresh compile helped.

 

b) Vivado stuck at synth_1:

Vivado was running for ~48h; when I investigated it, it hat only 2-3% CPU load and no IO going on.

The logs in synth_1 were empty, all other kernels where done.

 

Notably, both were very large designs, at least 20% larger than the largest successfully generated designs.

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Visitor
Visitor
3,499 Views
Registered: ‎03-11-2008

Hello,

I am experiencing this exact same issue, building with Vivado 2016.3... tail of the build log is pasted below, with the same message. At the moment I am stuck with the 2016.3 version, pending an upgrade; but can I ask what the solution to this was? The reply marked as "accepted answer" amounts to "I'll send you a private email"... which doesn't help the rest of the audience of a forum.

 

Thanks,

Eldridge

 


[Wed Jan 31 14:49:19 2018] Launched synth_1...
Run output will be captured here: /home/jenkins/jobs/<redacted>/runme.log
launch_runs: Time (s): cpu = 00:00:08 ; elapsed = 00:00:14 . Memory (MB): peak = 1939.145 ; gain = 0.000 ; free physical = 130 ; free virtual = 4835
[Wed Jan 31 14:49:19 2018] Waiting for synth_1 to finish...
[Wed Jan 31 15:49:59 2018] synth_1 finished
wait_on_run: Time (s): cpu = 01:00:36 ; elapsed = 01:00:40 . Memory (MB): peak = 1939.145 ; gain = 0.000 ; free physical = 277 ; free virtual = 5530
ERROR: [Common 17-69] Command failed: Run 'synth_1' has not been launched. Unable to open

while executing
"source implement.tcl"
(file "./masterBuilder.tcl" line 49)
INFO: [Common 17-206] Exiting Vivado at Wed Jan 31 15:49:59 2018...
Build step 'Execute shell' marked build as failure
Archiving artifacts
Recording test results
Finished: FAILURE

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Newbie
Newbie
2,642 Views
Registered: ‎10-04-2018

How is this marked as a solution?

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Visitor
Visitor
2,052 Views
Registered: ‎02-12-2019

I am having the same issue when attempting to export IP with Vivado HLS 2018.3. The runme.log file is never created with no indication of why the synthesis has failed to launch.

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Newbie
Newbie
1,892 Views
Registered: ‎04-08-2019

Hello,

We use Xilinx Vivado 2017.4, Family Kintex7 and Speedgoat Hardware. The problem is the same. What is the solution?

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Explorer
Explorer
960 Views
Registered: ‎02-19-2018
Running on Vivado HLS 2019.1.1 on Ubuntu 18.04, same problem. This thread should not have a solution marked, since the accepted "solution" is not a solution at all.
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Explorer
Explorer
952 Views
Registered: ‎02-19-2018

Couldn't see how to edit posts, but it turns out my problem was due to my license server being misconfigured, so Vivado couldn't find a license to do the sythensis run. Fixed that and now it works.

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