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ljgibbs
Observer
Observer
1,510 Views
Registered: ‎07-09-2018

Fail generate bsp in vitis19.2 with lwip

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hi all

when I add lwip to my bsp and generate it,it fail and get error msg:

Error:Hw specification provided does not have the HwDb.Plz check you .xsa

 

I'm new to Vitis,I'm confused with this situation.

THX

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nutang
Moderator
Moderator
1,441 Views
Registered: ‎08-20-2018

Hi @ljgibbs 

Glad to hear that the issue is resolved.

Platform build/Generation is documented below. 

https://www.xilinx.com/html_docs/xilinx2019_2/vitis_doc/Chunk420476775.html#fcr1566226841785

platform_generate.PNG

 

Best Regards,
Nutan
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rajut
Xilinx Employee
Xilinx Employee
1,474 Views
Registered: ‎12-21-2016

Hi,

Can you please share the exact steps  and also attach the xsa to this post if possible?

 

Regards,
Raju
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ljgibbs
Observer
Observer
1,453 Views
Registered: ‎07-09-2018

Hi rajut

I export .xsa again as a new platform and try generate bsp again.It's Ok this time. So wired...

Maybe I generate bsp before build platform cause this error,I'm not sure.

by the way,the platform have to be 'built' and get rid of tag 'out of date'?  I'm confused because there is no step to build hw_platform in SDK.

THX

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nutang
Moderator
Moderator
1,442 Views
Registered: ‎08-20-2018

Hi @ljgibbs 

Glad to hear that the issue is resolved.

Platform build/Generation is documented below. 

https://www.xilinx.com/html_docs/xilinx2019_2/vitis_doc/Chunk420476775.html#fcr1566226841785

platform_generate.PNG

 

Best Regards,
Nutan
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ljgibbs
Observer
Observer
1,391 Views
Registered: ‎07-09-2018

Hi nutang

Thank for your help.Could you help me with another issue on SDK?

https://forums.xilinx.com/t5/Ethernet/Can-t-generate-a-bsp-with-a-axiethernet-IP-SDK18-3/m-p/1063513#M17790

 

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olupj
Explorer
Explorer
703 Views
Registered: ‎01-27-2008

@nutang 

This worked for me as well but how is it different than doing a "Clean Project" / "Build Project" cycle (which failed on an XSA with the same error after generating several)?

Thanks,

Jerry

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