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boydun
Observer
Observer
743 Views
Registered: ‎04-15-2018

Parallelizing computation along right axis

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The logic below uses 25 DSP slices, while my intention is for it to use ~500 to fully parallelize the matrix-vector calculation. It looks like rather than parallelizing along the DIMENSION axis of the matrix, the computation is being parallelized along the CHUNK_SIZE axis despite my pragma and the structure of the loops. Any ideas why that might be and how to fix it?

for (int k = 0; k < CHUNK_SIZE; k++) {
for (int j = 0; j < DIMENSION; j++) {
#pragma HLS UNROLL factor=500
vec_out[j] += vec_in[k + chunk_iter * CHUNK_SIZE] * mat_chunk[j * CHUNK_SIZE + k];
}
}

Thanks,
Peter

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brucey
Xilinx Employee
Xilinx Employee
789 Views
Registered: ‎03-24-2010

Have you partitioned "vec_out" fully?

And have you partitioned "vec_in" and "mat_chunk"?

Regards,
brucey
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brucey
Xilinx Employee
Xilinx Employee
790 Views
Registered: ‎03-24-2010

Have you partitioned "vec_out" fully?

And have you partitioned "vec_in" and "mat_chunk"?

Regards,
brucey
----------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful and reply oriented.
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View solution in original post

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kalib
Xilinx Employee
Xilinx Employee
693 Views
Registered: ‎01-12-2017
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