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Davix
Contributor
Contributor
879 Views
Registered: ‎11-18-2020

Profiling kernel

Hi all,

I created a kernel and i run it on the board, but i noticed that the execution time of the kernel is not the same showed in the post-cosimulation with vitis hls. How can i perform a profiling of the kernel when running on the board?

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12 Replies
ViratAgarwal
Xilinx Employee
Xilinx Employee
837 Views
Registered: ‎06-24-2020

Hi @Davix ,

In order to enable profiling, you can just add the following in the xrt.ini -

[Debug]

profile=true

 

In order to observe the waveforms as well you may add "timeline_trace=true" as well. Both the infos will be captured in a run_summary file which can be observed using the following -

vitis_analyzer <name of the run_summary file>

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Davix
Contributor
Contributor
818 Views
Registered: ‎11-18-2020

Hi @ViratAgarwal ,

I read this from the vitis document. It says that using Vitis IDE the xrt.ini file is automatically generated, but i cannot find this file in the workspace. How i can solve this problem?

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ViratAgarwal
Xilinx Employee
Xilinx Employee
804 Views
Registered: ‎06-24-2020

Hi @Davix ,

Kindly follow the following steps to set modify the xrt.ini in the Vitis IDE-

1. Create the IDE project and build it for the respective flow.

2. Select Run Configurations in the drop down menu next to the Run button.

3. System Project Debug -> <project_name>-Default ->Main -> Xilinx Runtime Profiling -> Edit -> Select the required option (I guess it will be OpenCL detailed profile summary and timeline trace in your case) -> Apply -> Run.

These settings will be reflected in the generated xrt.ini (Observable in the xrt.ini present in the <Project_name>-Default_<project_name> dropdown) and create a Run summary which includes the data of the timeline trace.

In order to observe the timeline_trace follow the following steps-

1. Go to the Assistant and open the <Project_name> [Host] dropdown

2. Select the dropdown of the flow you are running for -> Double click the Run_Summary (xclbin) option.

3. A Vitis Analyzer window will pop up and all the info in the run summary can be observed using that. The Timeline trace can be observed under the Application Timeline section of the same.

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Davix
Contributor
Contributor
803 Views
Registered: ‎11-18-2020

I'm stuck at point 3 of the first part. When i run it shows an error : "Could not connect to host '192.168.0.1' specified in the target 'Linux Agent'

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ViratAgarwal
Xilinx Employee
Xilinx Employee
792 Views
Registered: ‎06-24-2020

Hi @Davix ,

I am not sure the cause of the issue. Can you please retry once.

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Davix
Contributor
Contributor
758 Views
Registered: ‎11-18-2020

@ViratAgarwal I tryied again, but the error shown is the same. What should be the IP of the linux agent?

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ViratAgarwal
Xilinx Employee
Xilinx Employee
640 Views
Registered: ‎06-24-2020

Hi @Davix ,

After booting linux, type "ifconfig", which will give you the IP. Follow the following steps -

1. Go to Launch Target connections and select Linux TCF Agent.

2. Add the IP in target connections like below -

ViratAgarwal_0-1610964805143.png

3. Click on OK and then follow the steps I mentioned earlier.

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Davix
Contributor
Contributor
582 Views
Registered: ‎11-18-2020

Hi @ViratAgarwal ,

I'm quite confused. From the vitis documentation, i understood that the tcf linux agent is used for profiling and debugging when running sw emulation or hw emulation. Instead, for hardware in needed the hw_server. Is that right or i misunderstood?

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Davix
Contributor
Contributor
554 Views
Registered: ‎11-18-2020

I followed your instructions, but i'm still not able to connect to linux agent.

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ViratAgarwal
Xilinx Employee
Xilinx Employee
547 Views
Registered: ‎06-24-2020

Hi @Davix ,

What you understood is correct. Can you please once try the steps I gave earlier but instead of System Project Debug use Application Project Debug.

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Davix
Contributor
Contributor
532 Views
Registered: ‎11-18-2020

If i select the Single Application Debug (hope this is what you are referring) the window is totally different from System Project Debug. What i have to select in the "Main" tab?

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ViratAgarwal
Xilinx Employee
Xilinx Employee
478 Views
Registered: ‎06-24-2020

Hi @Davix ,

Can you please mention VITIS version you are using? If you are using 2020.2, single application debug may not work because now everything is set from the system project debug.

We tried debugging the application built for hw_emu and it is working fine.

Can you mention the steps you followed OR provide the chapter from the document UG. We can get some more information from the same. Kindly also mention the platform you are using.

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