06-29-2020 11:37 PM - last edited on 08-07-2020 02:25 AM by sandrao
The Vitis Acceleration, SDAccel and SDSoC is board to discuss questions and issues around the Acceleration on Xilinx families using Vitis Acceleration, SDAccel and SDSoC tools.
The Vitis Unified Software Platform is an exciting new offering that enables a broad new range of developers – including software engineers and AI scientists – to take advantage of the power of hardware adaptability.
The pronunciation of Vitis is viˈtas. It sounds similar to Vital (viˈtal)
The Vitis Unified Software Platform has multiple areas that are covered in different boards within the our Community. Posting your question on the correct board will help the Community be able to get involved with your question.
The Vitis Acceleration, SDAccel and SDSoC board is the best board for questions on Acceleration.
For questions on Vitis Embedded Software Development flow, SDK, Compiler, and Debugger Tools the Embedded Development Tools board is the best choice.
For questions on Accelerating AI on DC, Cloud, Edge, and Embedded platforms with Vitis AI tools, Xilinx Deephi DNNDK and ML Suite AI and Vitis AI board is the best choice.
When using an Alveo card questions on card bring-up, XRT, firmware/drivers, shells, card management, card utilities the Alveo board is the best choice.
Note: Alveo Target Platforms for 2019.2 are compatible with Vitis tools 2020.1
For instructions on how to create custom embedded target platforms for Vitis, see Vitis Embedded Software Development User Guide – UG1416
Vitis known issues are posted in the Xilinx website as Answer Records.
|AR#72773||2019.X Known issues|
|AR#73646||2020.1 Known issues|