cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Preeti20
Observer
Observer
1,295 Views
Registered: ‎10-14-2020

Vitis hello world

Jump to solution

Hello,

I have an enquiry about vitis tool with Ultra96 board.
I just ran the hello world c program in vitis, but after launching in hardware output of "hello world"  is not shown in terminal, and there is no error and no msg in terminal.
I'm following this video to do a program in vitis 2020.1  using vivado tool also. 
I'm doing a port connection step in vitis  with zynq , fpga kit 
Till build the project, all the steps output I'm getting but output is not shown in terminal,  
Please let me know, why the output is not shown in terminal..
please if u can solve this issue, please help me, i will be more grateful to you.
Vitis hello world example link:
 
Thanks and Regards,
Preeti
Walk through of creation of Hello World using Avnet minized board, Xilinx Zynq, Vivado 2020, and Vitis.
1 Solution

Accepted Solutions
Preeti20
Observer
Observer
1,113 Views
Registered: ‎10-14-2020

Hello 

Thanks for giving solutions.and it worked and my problem solved..

i changed the uart in Bsp,,

BSP settings  and project settings, also i changed the mss file by selecting proper uart.

then it displayed the hello world in vitis terminal. 

thank you..

View solution in original post

0 Kudos
5 Replies
dpaul24
Scholar
Scholar
1,273 Views
Registered: ‎08-07-2014

@Preeti20 ,

Difficult to answer without more inputs from what you have actually done.

Did the project build successfully? Any critical Warnings or Error Messages? Was the bitstream generated without errors?

Are you using the same baud rate for the UART IP and the terminal @ PC?

------------FPGA enthusiast------------
Consider giving "Kudos" if you like my answer. Please mark my post "Accept as solution" if my answer has solved your problem

0 Kudos
Preeti20
Observer
Observer
1,208 Views
Registered: ‎10-14-2020

Hello

yes, project build successfullyand no critical Warnings no Error Messages and  bitstream generated without errors.

after build project, the output hello world is not displaying in vitis serial terminal.

0 Kudos
dpaul24
Scholar
Scholar
1,199 Views
Registered: ‎08-07-2014

@Preeti20 ,

What about this Q - Are you using the same baud rate for the UART IP and the terminal @ PC?

if you are using the same baud rate and still do not see anything, then you need to debug at the simulation level.

Do you have a testbench set up? Have you verified your design on simulation?

------------FPGA enthusiast------------
Consider giving "Kudos" if you like my answer. Please mark my post "Accept as solution" if my answer has solved your problem

pavan_619@
Adventurer
Adventurer
1,177 Views
Registered: ‎03-13-2019

Hello @Preeti20 

As mentioned by @dpaul24 the information is not sufficient for UART.

Can you the check the BSP settings of the project and check the settings for 
stdin and stdout.

Since there are two UART you need to make sure you have selected proper one.

Have you connected both JTAG and UART in your project?

Regards
Pavan

Preeti20
Observer
Observer
1,114 Views
Registered: ‎10-14-2020

Hello 

Thanks for giving solutions.and it worked and my problem solved..

i changed the uart in Bsp,,

BSP settings  and project settings, also i changed the mss file by selecting proper uart.

then it displayed the hello world in vitis terminal. 

thank you..

View solution in original post

0 Kudos